®
Integrated Device Technology, Inc.
HIGH-PERFORMANCE |
IDT54/74FCT861A/B |
CMOS BUS |
IDT54/74FCT863A/B |
TRANSCEIVERS |
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FEATURES:
•Equivalent to AMD’s Am29861-64 bipolar registers in pinout/function, speed and output drive over full temperature and voltage supply extremes
•IDT54/74FCT861A/863A equivalent to FAST™ speed
•IDT54/74FCT861B/863B 25% faster than FAST
•High-speed symmetrical bidirectional transceivers
•IOL = 48mA (commercial) and 32mA (military)
•Clamp diodes on all inputs for ringing suppression
•CMOS power levels (1mW typ. static)
•TTL input and output level compatible
•CMOS output level compatible
•Substantially lower input current levels than AMD’s bipolar Am29800 Series (5μA max.)
•Product available in Radiation Tolerant and Radiation Enhanced versions
•Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT800 series is built using an advanced dual metal CMOS technology.
The IDT54/74FCT860 series bus transceivers provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. The IDT54/74FCT863 9-bit transceivers have NAND-ed output enables for maximum control flexibility.
All of the IDT54/74FCT800 high-performance interface family are designed for high-capacitance load drive capability while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes and all outputs are designed for low-capacitance bus loading in the highim- pedance state.
FUNCTIONAL BLOCK DIAGRAMS
IDT54/74FCT861 |
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IDT54/74FCT863 |
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T0 |
T1 -T9 |
OER |
T0 |
T1 -T8 |
OER1 OER2 |
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R0 |
R1- R9 |
OET |
R0 |
R1- R8 |
OET1 OET2 |
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2610 drw 01 |
PRODUCT SELECTOR GUIDE
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Device |
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10-Bit |
9-Bit |
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Non-inverting IDT54/74FCT861 |
IDT54/74FCT863 |
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The IDT logo is a registered trademark of Integrated Device Technology, Inc. |
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FAST is a trademark of National Semiconductor Co. |
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MILITARY AND COMMERCIAL TEMPERATURE RANGES |
APRIL 1994 |
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©1994 Integrated Device Technology, Inc. |
7.23 |
DSC-4620/3 |
1
IDT54/74FCT861A/B, IDT54/74FCT863A/B HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS
PIN CONFIGURATIONS
IDT54/74FCT861 10-BIT TRANSCEIVERS
OER |
1 |
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24 |
Vcc |
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R0 |
2 |
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23 |
T0 |
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R1 |
3 |
P24-1, |
22 |
T1 |
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R2 |
4 |
21 |
T2 |
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R3 |
5 |
D24-1, |
20 |
T3 |
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E24-1 |
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R4 |
6 |
19 |
T4 |
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& |
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R5 |
7 |
SO24-2 |
18 |
T5 |
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R6 |
8 |
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17 |
T6 |
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R7 |
9 |
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16 |
T7 |
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R8 |
10 |
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15 |
T8 |
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R9 |
11 |
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14 |
T9 |
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GND |
12 |
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13 |
OET |
DIP/CERPACK/SOIC
TOP VIEW
IDT54/74FCT863 9-BIT TRANSCEIVERS
OER 1 |
1 |
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24 |
Vcc |
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R0 |
2 |
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23 |
T0 |
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R1 |
3 |
P24-1, |
22 |
T1 |
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R2 |
4 |
21 |
T2 |
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R3 |
5 |
D24-1, |
20 |
T3 |
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E24-1 |
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R4 |
6 |
19 |
T4 |
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& |
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R5 |
7 |
SO24-2 |
18 |
T5 |
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R6 |
8 |
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17 |
T6 |
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R7 |
9 |
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16 |
T7 |
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R8 |
10 |
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15 |
T8 |
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OER 2 |
11 |
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14 |
OET 2 |
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GND |
12 |
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13 |
OET 1 |
DIP/CERPACK/SOIC
TOP VIEW
LOGIC SYMBOLS
IDT54/74FCT861
OET
10 |
10 |
R |
T |
OER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
INDEX |
R |
R0 |
OER NC Vcc |
T0 |
T1 |
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1 |
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R2 |
4 |
3 |
2 |
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28 27 26 |
T2 |
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5 |
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25 |
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1 |
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R3 |
6 |
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24 |
T3 |
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R4 |
7 |
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L28-1 |
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23 |
T4 |
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NC |
8 |
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22 |
NC |
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R5 |
9 |
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21 |
T5 |
R6 |
10 |
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20 |
T6 |
R7 |
11 |
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19 |
T7 |
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12 13 14 15 16 17 18 |
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R8 |
R9 |
GND |
NC OET |
T9 |
T8 |
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LCC
TOP VIEW
INDEX |
R1 |
R0 |
OER |
NC Vcc |
T0 |
T1 |
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R2 |
4 |
3 |
2 |
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28 27 26 |
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5 |
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25 |
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1 |
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R3 |
6 |
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24 |
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R4 |
7 |
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L28-1 |
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23 |
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NC |
8 |
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22 |
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R5 |
9 |
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21 |
R6 |
10 |
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20 |
R7 |
11 |
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19 |
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12 13 14 15 16 17 18 |
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R8 |
OER 2 |
GND |
NC OET1 |
OET 2 |
T8 |
LCC
TOP VIEW
IDT54/74FCT863
T2
T3
T4
NC
T5
T6
T7
2610 drw 02
OET1
OET2
R |
9 |
9 |
T |
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OER1 |
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OER2 |
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2610 drw 03 |
7.23 |
2 |
IDT54/74FCT861A/B, IDT54/74FCT863A/B |
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HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS |
MILITARY AND COMMERCIAL TEMPERATURE RANGES |
PIN DESCRIPTION
Name |
I/O |
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Description |
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IDT54/74FCT861 |
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OER |
I |
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When LOW in conjunction with OET HIGH |
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activates the RECEIVE mode. |
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OET |
I |
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When LOW in conjunction with OER HIGH |
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activates the TRANSMIT mode. |
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RI |
I/O |
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10-bit RECEIVE input/output. |
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TI |
I/O |
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10-bit TRANSMIT input/output. |
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IDT54/74FCT863 |
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OERI |
I |
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When LOW in conjunction with OETI HIGH |
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activates the RECEIVE mode. |
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OETI |
I |
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When LOW in conjunction with OERI HIGH |
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activates the TRANSMIT mode. |
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RI |
I/O |
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9-bit RECEIVE input/output. |
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TI |
I/O |
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9-bit TRANSMIT input/output. |
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2610 tbl 01
FUNCTION TABLE(1)
IDT54/74FCT861/863 (Non-inverting)
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Inputs |
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Outputs |
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OET |
OER |
RI |
TI |
RI |
TI |
Function |
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L |
H |
L |
N/A |
N/A |
L |
Transmitting |
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L |
H |
H |
N/A |
N/A |
H |
Transmitting |
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H |
L |
N/A |
L |
L |
N/A |
Receiving |
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H |
L |
N/A |
H |
H |
N/A |
Receiving |
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H |
H |
X |
X |
Z |
Z |
High Z |
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NOTE: |
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2610 tbl 02 |
1.H = HIGH, L = LOW, Z = High Impedance, X = Don’t Care, N/A = Not Applicable.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol |
Rating |
Commercial |
Military |
Unit |
VTERM(2) |
Terminal Voltage |
–0.5 to +7.0 |
–0.5 to +7.0 |
V |
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with Respect |
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to GND |
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VTERM(3) |
Terminal Voltage |
–0.5 to VCC |
–0.5 to VCC |
V |
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with Respect |
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to GND |
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TA |
Operating |
0 to +70 |
–55 to +125 |
°C |
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Temperature |
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TBIAS |
Temperature |
–55 to +125 |
–65 to +135 |
°C |
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Under Bias |
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TSTG |
Storage |
–55 to +125 |
–65 to +150 |
°C |
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Temperature |
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PT |
Power Dissipation |
0.5 |
0.5 |
W |
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IOUT |
DC Output Current |
120 |
120 |
mA |
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NOTES: |
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2610 tbl 03 |
1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted.
2.Inputs and VCC terminals only.
3.Outputs and I/O terminals only.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol |
Parameter(1) |
Conditions |
Typ. |
Max. |
Unit |
CIN |
Input Capacitance |
VIN = 0V |
6 |
10 |
pF |
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CI/O |
I/O Capacitance |
VOUT = 0V |
8 |
12 |
pF |
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NOTE: |
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2610 tbl 04 |
1. This parameter is guaranteed by characterization but not tested.
7.23 |
3 |