Integrated Device Technology Inc IDT6116LA120DB, IDT6116LA120PB, IDT6116LA120SOB, IDT6116LA120TDB, IDT6116LA120TPB Datasheet

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Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES MARCH 1996
1996 Integrated Device Technology, Inc. 5.1 3089/1
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
The IDT logo is aregistered trademark of Integrated Device Technology, Inc.
FEATURES:
High-speed access and chip select times
Military: 20/25/35/45/55/70/90/120/150ns (max.)
Low-power consumption
Battery backup operation
— 2V data retention voltage (LA version only)
Produced with advanced CMOS high-performance
technology
CMOS process virtually eliminates alpha particle
soft-error rates
Input and output directly TTL-compatible
Static operation: no clocks or refresh required
Available in ceramic and plastic 24-pin DIP, 24-pin Thin
Dip and 24-pin SOIC and 24-pin SOJ
Military product compliant to MIL-STD-833, Class B
DESCRIPTION:
The IDT6116SA/LA is a 16,384-bit high-speed static RAM
organized as 2K x 8. It is fabricated using IDT's high-perfor-
mance, high-reliability CMOS technology.
Access times as fast as 15ns are available. The circuit also
offers a reduced power standby mode. When
CS
goes HIGH,
the circuit will automatically go to, and remain in, a standby
power mode, as long as
CS
remains HIGH. This capability
provides significant system level power and cooling savings.
The low-power (LA) version also offers a battery backup data
retention capability where the circuit typically consumes only
1µW to 4µW operating off a 2V battery.
All inputs and outputs of the IDT6116SA/LA are TTL-
compatible. Fully static asynchronous circuitry is used, requir-
ing no clocks or refreshing for operation.
The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil
plastic or ceramic DIP and a 24-lead gull-wing SOIC, and a 24
-lead J-bend SOJ providing high board-level packing densi-
ties.
Military grade product is manufactured in compliance to the
latest version of MIL-STD-883, Class B, making it ideally
suited to military temperature applications demanding the
highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
CS
A
0
A
10
I/O 0
I/O
7
OE
WE
128 X 128
MEMORY
ARRAY
I/O CONTROL
ADDRESS
DECODER
INPUT
DATA
CIRCUIT
CONTROL
CIRCUIT
GND
3089 drw 01
VCC
1
IDT6116SA
IDT6116LA
CMOS STATIC RAM
16K (2K x 8 BIT)
5.1 2
IDT6116SA/LA
CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Rating Commercial Military Unit
Terminal Voltage
V
TERM
(2)
with Respect to GND –0.5 to + 7.0 –0.5 to +7.0 V
Operating
T
A Temperature 0 to + 70 –55 to +125 °C
Temperature
T
BIAS Under Bias –55 to + 125 –65 to +135 °C
Storage
T
STG Temperature –55 to + 125 –65 to +150 °C
Power
P
T Dissipation 1.0 1.0 W
I
OUT DC Output Current 50 50 mA
NOTES: 3089 tbl 04
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2. V
TERM must not exceed VCC +0.5V.
TRUTH TABLE
(1)
Mode
CS
CS
OE
OE
WE
WE
I/O
Standby H X X High-Z
Read L L H DATA
OUT
Read L H H High-Z
Write L X L DATA
IN
NOTE: 3089 tbl 02
1. H = VIH, L = VIL, X = Don't Care.
PIN DESCRIPTIONS
A0–A13 Address Inputs
I/O
0–I/O7 Data Input/Output
CS
Chip Select
WE
Write Enable
OE
Output Enable
V
CC Power
GND Ground
3089 tbl 01
CAPACITANCE (TA = +25°C, F = 1.0 MHZ)
Symbol Parameter
(1)
Conditions Max. Unit
C
IN Input Capacitance VIN = 0V 8 pF
C
I/O I/O Capacitance VOUT = 0V 8 pF
NOTE: 3089 tbl 03
1. This parameter is determined by device characterization, but is not
production tested.
DIP/SOIC/SOJ
TOP VIEW
3089 drw 02
5
6
7
8
9
10
11
12
GND
1
2
3
4
24
23
22
21
20
19
18
17
P24-2
P24-1
D24-2
D24-1
SO24-2
&
S024-4
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
I/O
1
V
CC
A
9
WE
A
10
I/O
5
I/O
4
OE
16
15
14
13
A
7
A
6
I/O
7
I/O
6
CS
A
8
I/O
2
I/O
3
5.1 3
IDT6116SA/LA
CMOS STATIC RAM 16K (2K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
6116SA15
(2)
6116SA20 6116SA25 6116SA35
6116LA15
(2)
6116LA20 6116LA25 6116LA35
Symbol Parameter Power Com'l. Mil. Com'l. Mil. Com'l. Mil. Com'l. Mil. Unit
I
CC1 Operating Power Supply SA 105 105 130 80 90 80 90 mA
Current,
CS
V
IL,
Outputs Open, LA 95 95 120 75 85 75 85
V
CC = Max., f = 0
I
CC2 Dynamic Operating SA 150 130 150 120 135 100 115 mA
Current,
CS
V
IL,
V
CC = Max., LA 140 120 140 110 125 95 105
Outputs Open, f = f
MAX
(4)
ISB Standby Power Supply SA 40 40 50 40 45 25 35 mA
Current (TTL Level)
CS
V
IH, VCC = Max., LA 35 35 45 35 40 25 30
Outputs Open, f = f
MAX
(4)
ISB1 Full Standby Power SA 2 2 10 2 10 2 10 mA
Supply Current
(CMOS Level),
CS
V
HC, LA 0.1 0.1 0.9 0.1 0.9 0.1 0.9
V
CC = Max., VIN VHC
or VIN VLC, f = 0
NOTES: 3089 tbl 08
1. All values are maximum guaranteed values.
2. 0°C to + 70°C temperature range only.
3. –55°C to + 125°C temperature range only.
4. f
MAX = 1/tRC, only address inputs are cycling at fMAX, f = 0 means address inputs are not changing.
DC ELECTRICAL CHARACTERISTICS
(1)
VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V ± 10%
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Ambient
Grade Temperature GND VCC
Military –55°C to +125°C 0V 5.0V ± 10%
Commercial 0°C to +70°C 0V 5.0V ± 10%
3089 tbl 05
IDT6116SA IDT6116LA
Symbol Parameter Test Conditions Min. Max. Min. Max. Unit
MIL. 10 5
|I
LI| Input Leakage Current VCC = Max., VIN = GND to VCC COM'L. 5 2 µA
V
CC = Max. MIL. 10 5
|I
LO| Output Leakage Current
CS
= VIH, VOUT = GND to VCC COM'L. 5 2 µA
V
OL Output Low Voltage IOL = 8mA, VCC = Min. 0.4 0.4 V
V
OH Output High Voltage IOH = –4mA, VCC = Min. 2.4 2.4 V
3089 tbl 07
RECOMMENDED DC
OPERATING CONDITIONS
Symbol Parameter Min. Typ. Max. Unit
V
CC Supply Voltage 4.5 5.0 5.5
(2)
V
G
ND Supply Ground 0 0 0 V
V
IH Input High Voltage 2.2 3.5 VCC +0.5 V
V
IL Input Low Voltage –0.5
(1)
0.8 V
NOTES: 3089 tbl 06
1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle.
2. V
IN must not exceed VCC +0.5V.
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