HIGH-SPEED |
IDT7016S/L |
16K x 9 DUAL-PORT |
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STATIC RAM |
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Integrated Device Technology, Inc.
FEATURES:
•True Dual-Ported memory cells which allow simultaneous access of the same memory location
•High-speed access
—Military: 20/25/35ns (max.)
—Commercial:12/15/20/25/35ns (max.)
•Low-power operation
—IDT7016S
Active: 750mW (typ.) Standby: 5mW (typ.)
—IDT7016L
Active: 750mW (typ.) Standby: 1mW (typ.)
•IDT7016 easily expands data bus width to 18 bits or more using the Master/Slave select when cascading more than one device
•M/S = H for BUSY output flag on Master M/S = L for BUSY input on Slave
•Busy and Interrupt Flags
•On-chip port arbitration logic
•Full on-chip hardware support of semaphore signaling between ports
•Fully asynchronous operation from either port
•Devices are capable of withstanding greater than 2001V electrostatic discharge
•TTL-compatible, single 5V (±10%) power supply
•Available in ceramic 68-pin PGA, 68-pin PLCC, and an 80-pin TQFP
•Industrial temperature range (–40°C to +85°C) is available, tested to military electrical specifications
DESCRIPTION:
The IDT7016 is a high-speed 16K x 9 Dual-Port Static RAMs. The IDT7016 is designed to be used as standalone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 18-bit-or-more wider systems.
FUNCTIONAL BLOCK DIAGRAM
OEL |
OER |
CEL |
CER |
R/WL |
R/WR |
I/O0L- I/O8L |
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I/O |
I/O |
I/O0R-I/O8R |
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Control |
Control |
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(1,2) |
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(1,2) |
BUSYL |
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BUSYR |
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A13L |
Address |
MEMORY |
Address |
A13R |
A0L |
Decoder |
ARRAY |
Decoder |
A0R |
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14 |
14 |
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ARBITRATION |
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CEL |
INTERRUPT |
CER |
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SEMAPHORE |
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OEL |
OER |
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LOGIC |
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R/WL |
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R/WR |
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SEML |
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SEMR |
(2) |
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(2) |
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INTL |
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M/S |
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INTR |
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3190 drw 01 |
NOTES:
1.In MASTER mode: BUSY is an output and is a push-pull driver In SLAVE mode: BUSY is input.
2.BUSY outputs and INT outputs are non-tri-stated push-pull drivers.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES |
OCTOBER 1996 |
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©1996 Integrated Device Technology, Inc. |
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391. |
DSC-3190/2 |
6.13 |
1 |
IDT7016S/L |
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HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM |
MILITARY AND COMMERCIAL TEMPERATURE RANGES |
Using the IDT MASTER/SLAVE Dual-Port RAM approach in 18-bit or wider memory system applications results in fullspeed, error-free operation without the need for additional discrete logic.
This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low
standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 750mW of power.
The IDT7016 is packaged in a ceramic 68-pin PGA, a 64pin PLCC and an 80-pin TQFP (Thin Quad FlatPack). Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
PIN CONFIGURATIONS(1,2)
INDEX
I/O1L I/O0L I/O8L OEL R/WL SEML CEL |
N/C A13L VCC A12L |
A11L A10L |
A9L A8L A7L A6L |
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I/O2L |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
68 67 66 65 64 |
63 62 61 |
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A5L |
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10 |
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60 |
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I/O3L |
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11 |
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59 |
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A4L |
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I/O4L |
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12 |
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58 |
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A3L |
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I/O5L |
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13 |
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57 |
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A2L |
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GND |
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14 |
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56 |
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A1L |
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I/O6L |
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15 |
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55 |
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A0L |
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I/O7L |
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16 |
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IDT7016 |
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54 |
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L |
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VCC |
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J68-1 |
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INT |
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17 |
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53 |
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BUSYL |
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GND |
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18 |
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PLCC |
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52 |
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GND |
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I/O0R |
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19 |
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TOP VIEW(3) |
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51 |
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M/ |
S |
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I/O1R |
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20 |
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50 |
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R |
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I/O2R |
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BUSY |
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21 |
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49 |
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INTR |
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VCC |
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22 |
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48 |
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A0R |
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I/O3R |
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23 |
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47 |
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A1R |
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I/O4R |
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24 |
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46 |
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A2R |
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I/O5R |
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45 |
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A3R |
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I/O6R |
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44 |
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A4R |
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27 |
28 29 |
30 31 |
32 33 34 35 |
36 37 38 39 |
40 41 42 43 |
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I/O7R |
I/O8R ROE R/WR SEMR CER |
N/C A13R GND A12R A11R A10R |
A9R A8R |
A7R A6R A5R |
NOTES:
1.All VCC pins must be connected to power supply.
2.All GND pins must be connected to ground supply.
3.This text does not imply orientation of Part-Mark.
3190 drw 02
PIN NAMES
Left Port |
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Right Port |
Names |
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CEL |
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CER |
Chip Enable |
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R/WL |
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R/WR |
Read/Write Enable |
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OEL |
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OER |
Output Enable |
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A0L – A13L |
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A0R – A13R |
Address |
I/O0L – I/O8L |
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I/O0R – I/O8R |
Data Input/Output |
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SEML |
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SEMR |
Semaphore Enable |
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INTL |
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INTR |
Interrupt Flag |
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BUSYL |
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BUSYR |
Busy Flag |
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M/S |
Master or Slave Select |
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VCC |
Power |
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GND |
Ground |
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3190 tbl 01 |
6.13 |
2 |
IDT7016S/L |
|
HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM |
MILITARY AND COMMERCIAL TEMPERATURE RANGES |
PIN CONFIGURATIONS (CONT'D) (1,2)
|
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I/O1L |
I/O0L |
I/O8L |
OEL |
R/WL |
SEM L |
CEL |
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NC |
NC |
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A13L |
VCC |
A12L |
A11L |
A10L |
A9L |
A8L |
A7L |
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A6L |
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NC |
NC |
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INDEX |
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NC |
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1 |
80 |
79 |
78 |
77 |
76 |
75 |
74 |
73 |
72 |
71 |
70 |
69 |
68 |
67 |
66 |
65 |
64 |
63 |
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62 |
61 |
60 |
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59 |
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I/O2L |
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2 |
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58 |
||
I/O3L |
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3 |
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57 |
||
I/O4L |
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4 |
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56 |
||
I/O5L |
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5 |
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55 |
||
GND |
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6 |
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54 |
||
I/O6L |
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7 |
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IDT7016 |
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53 |
||||||||||
I/O7L |
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8 |
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PN-80 |
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52 |
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VCC |
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9 |
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TQFP |
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51 |
|||||||||
NC |
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10 |
|
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TOP VIEW(3) |
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50 |
|||||||||||||||
GND |
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|
11 |
|
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|||||||||||||||||||
I/O0R |
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12 |
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49 |
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48 |
||
I/O1R |
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13 |
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47 |
||
I/O2R |
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14 |
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46 |
||
VCC |
|
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|
15 |
|
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45 |
||
I/O3R |
|
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16 |
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44 |
||
I/O4R |
|
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17 |
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43 |
||||
I/O5R |
|
|
18 |
|
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42 |
||||
I/O6R |
|
|
19 |
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41 |
||||
NC |
|
|
20 |
21 |
22 |
23 |
24 |
25 |
26 |
27 |
28 |
29 |
30 |
31 |
32 |
33 |
34 |
35 |
36 |
37 |
38 |
39 |
40 |
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7R |
I/O8R |
OER |
R/WR |
SEMR |
CER |
NC |
NC |
A13R |
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GND |
A12R |
A11R |
A10R |
A9R |
A8R |
A7R |
A6R |
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A5R |
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NC |
NC |
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I/O |
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NC
A5L
A4L
A3L
A2L
A1L
A0L
INTL
BUSYL
GND
M/S
BUSYR
INTR
A0R
A1R
A2R
A3R
A4R
NC
NC
3190 drw 03
11 |
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51 |
50 |
48 |
46 |
44 |
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42 |
40 |
38 |
36 |
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A5L |
A4L |
A2L |
A0L |
BUSYL |
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M/S |
INTR |
A1R |
A3R |
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10 |
53 |
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52 |
49 |
47 |
45 |
43 |
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41 |
39 |
37 |
35 |
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34 |
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A7L |
A6L |
A3L |
A1L |
INTL |
GND |
BUSYR |
A0R |
A2R |
A4R |
A5R |
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09 |
55 |
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54 |
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32 |
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33 |
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A9L |
A8L |
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A7R |
A6R |
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08 |
57 |
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56 |
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30 |
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31 |
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A11L |
A10L |
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A9R |
A8R |
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07 |
59 |
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58 |
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IDT7016 |
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28 |
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29 |
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VCC |
A12L |
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A11R |
A10R |
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G68-1 |
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06 |
61 |
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60 |
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68-PIN PGA |
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26 |
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27 |
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N/C |
A13L |
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GND |
A12R |
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05 |
63 |
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62 |
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TOP VIEW(3) |
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24 |
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25 |
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SEML |
CEL |
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N/C |
A13R |
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04 |
65 |
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64 |
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22 |
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23 |
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OE |
L |
R/WL |
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SEMR |
CE |
R |
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03 |
67 |
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66 |
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20 |
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21 |
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I/O0L |
I/O8L |
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OE |
R |
R/WR |
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02 |
68 |
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1 |
3 |
5 |
7 |
9 |
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11 |
13 |
15 |
18 |
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19 |
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I/O1L |
I/O2L |
I/O4L |
GND |
I/O7L |
GND |
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I/O1R |
VCC |
I/O4R |
I/O7R |
I/O8R |
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01 |
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2 |
4 |
6 |
8 |
10 |
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12 |
14 |
16 |
17 |
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I/O3L |
I/O5L |
I/O6L |
VCC |
I/O0R |
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I/O2R |
I/O3R |
I/O5R |
I/O6R |
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NOTES: |
A |
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B |
C |
D |
E |
F |
G |
H |
J |
K |
L |
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INDEX |
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1. All Vcc pins must be connected to the power supply. |
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3190 drw 04 |
||
2. All GND pins must be connected to the ground supply. |
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3. This text does not indicate orientation of the actual part-marking. |
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6.13 |
3 |
IDT7016S/L |
|
HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM |
MILITARY AND COMMERCIAL TEMPERATURE RANGES |
TRUTH TABLE I – NON-CONTENTION READ/WRITE CONTROL
|
Inputs(1) |
|
Outputs |
|
|
CE |
R/W |
OE |
SEM |
I/O0-8 |
Mode |
|
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|
H |
X |
X |
H |
High-Z |
Deselected: Power-Down |
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|
L |
L |
X |
H |
DATAIN |
Write to Memory |
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|
L |
H |
L |
H |
DATAOUT |
Read Memory |
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|
X |
X |
H |
X |
High-Z |
Outputs Disabled |
|
|
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|
|
|
NOTE: |
|
|
|
|
3190 tbl 02 |
1.Condition: A0L — A13L is not equal to A0R — A13R.
|
|
|
|
|
(1) |
TRUTH TABLE II – SEMAPHORE READ/WRITE CONTROL |
|||||
|
Inputs |
|
Outputs |
|
|
CE |
R/W |
OE |
SEM |
I/O0-8 |
Mode |
|
|
|
|
|
|
H |
H |
L |
L |
DATAOUT |
Read Semaphore Flag Data Out (I/O0 - I/O8) |
|
|
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|
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|
H |
u |
X |
L |
DATAIN |
Write I/O0 into Semaphore Flag |
|
|
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|
L |
X |
X |
L |
— |
Not Allowed |
|
|
|
|
|
|
NOTE: |
|
|
|
|
3190 tbl 03 |
1. There are eight semaphore flags written to via I/O0 and read from all I/O's (I/O0-I/O8). These eight semaphores are addressed by A0-A2.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol |
Rating |
Commercial |
Military |
Unit |
|
|
|
|
|
VTERM(2) |
Terminal Voltage |
–0.5 to +7.0 |
–0.5 to +7.0 |
V |
|
with Respect |
|
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|
to GND |
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|
TA |
Operating |
0 to +70 |
–55 to +125 |
°C |
|
Temperature |
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|
TBIAS |
Temperature |
–55 to +125 |
–65 to +135 |
°C |
|
Under Bias |
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TSTG |
Storage |
–55 to +125 |
–65 to +150 |
°C |
|
Temperature |
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|
IOUT |
DC Output |
50 |
50 |
mA |
|
Current |
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NOTES: |
|
|
3190 tbl 04 |
1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2.VTERM must not exceed Vcc + 0.5V for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM > Vcc + 0.5V.
CAPACITANCE(1)
(TA = +25°C, f = 1.0MHz, TQFP ONLY)
Symbol |
Parameter |
Conditions(2) |
Max. |
Unit |
CIN |
Input Capacitance |
VIN = 3dV |
9 |
pF |
|
|
|
|
|
COUT |
Output Capacitance |
VOUT = 3dV |
10 |
pF |
|
|
|
|
|
NOTES: |
|
|
|
3190 tbl 07 |
1.This parameter is determined by device characteristics but is not production tested.
2.3dV references the interpolated capacitance when the input and output signals switch from 0V to 3V or from 3V to 0V .
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
|
Ambient |
|
|
Grade |
Temperature |
GND |
VCC |
|
|
|
|
Military |
–55°C to +125°C |
0V |
5.0V ± 10% |
|
|
|
|
Commercial |
0°C to +70°C |
0V |
5.0V ± 10% |
|
|
|
|
3190 tbl 05
RECOMMENDED DC OPERATING
CONDITIONS
Symbol |
Parameter |
Min. |
Typ. |
Max. |
Unit |
|
|
|
|
|
|
VCC |
Supply Voltage |
4.5 |
5.0 |
5.5 |
V |
|
|
|
|
|
|
GND |
Supply Voltage |
0 |
0 |
0 |
V |
|
|
|
|
|
|
VIH |
Input High Voltage |
2.2 |
— |
6.0(2) |
V |
VIL |
Input Low Voltage |
–0.5(1) |
— |
0.8 |
V |
NOTES: |
|
|
|
3190 tbl 06 |
1.VIL > -1.5V for pulse width less than 10ns.
2.VTERM must not exceed Vcc + 0.5V.
6.13 |
4 |
IDT7016S/L |
|
HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM |
MILITARY AND COMMERCIAL TEMPERATURE RANGES |
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE (VCC = 5.0V ± 10%)
|
|
|
|
7016S |
7016L |
|
|
||
Symbol |
Parameter |
Test Conditions |
Min. |
|
Max. |
Min. |
|
Max. |
Unit |
|ILI| |
Input Leakage Current(1) |
VCC = 5.5V, VIN = 0V to VCC |
— |
|
10 |
— |
|
5 |
μA |
|ILO| |
Output Leakage Current |
CE = VIH, VOUT = 0V to VCC |
— |
|
10 |
— |
|
5 |
μA |
VOL |
Output Low Voltage |
IOL = 4mA |
— |
|
0.4 |
— |
|
0.4 |
V |
VOH |
Output High Voltage |
IOH = -4mA |
2.4 |
|
— |
2.4 |
|
— |
V |
NOTE: |
|
|
|
|
|
|
|
|
3190 tbl 08 |
1. At Vcc < 2.0V, Input leakages are undefined.
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1) (VCC = 5.0V ± 10%)
|
|
|
|
|
7016X12 |
7016X15 |
|
||
|
|
Test |
|
|
Com'l. Only |
Com'l. Only |
|
||
Symbol |
Parameter |
Condition |
Version |
|
Typ.(2) |
Max. |
Typ.(2) |
Max. |
Unit |
ICC |
Dynamic Operating |
CE = VIL, Outputs Open |
MIL. |
S |
— |
— |
— |
— |
mA |
|
Current |
SEM = VIH |
|
L |
— |
— |
— |
— |
|
|
(Both Ports Active) |
f = fMAX(3) |
COM’L. |
S |
170 |
325 |
170 |
310 |
|
|
|
|
|
L |
170 |
275 |
170 |
260 |
|
ISB1 |
Standby Current |
CER = CEL = VIH |
MIL. |
S |
— |
— |
— |
— |
mA |
|
(Both Ports — TTL |
SEMR = SEML = VIH |
|
L |
— |
— |
— |
— |
|
|
Level Inputs) |
f = fMAX(3) |
COM’L. |
S |
25 |
70 |
25 |
60 |
|
|
|
|
|
L |
25 |
60 |
25 |
50 |
|
ISB2 |
Standby Current |
CE"A"=VIL and CE"B" = VIH(5) |
MIL. |
S |
— |
— |
— |
— |
mA |
|
(One Port — TTL |
Active Port Outputs Open |
|
L |
— |
— |
— |
— |
|
|
Level Inputs) |
f = fMAX(3) |
COM’L. |
S |
105 |
200 |
105 |
190 |
|
|
|
SEMR= SEML = VIH |
|
L |
105 |
170 |
105 |
160 |
|
ISB3 |
Full Standby Current |
Both Ports CEL and |
MIL. |
S |
— |
— |
— |
— |
mA |
|
(Both Ports — All |
CER > VCC - 0.2V |
|
L |
— |
— |
— |
— |
|
|
CMOS Level Inputs) |
VIN > VCC - 0.2V or |
COM’L. |
S |
1.0 |
15 |
1.0 |
15 |
|
|
|
VIN < 0.2V, f = 0(4) |
|
L |
0.2 |
5 |
0.2 |
5 |
|
|
|
SEMR = SEML > VCC - 0.2V |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ISB4 |
Full Standby Current |
CE"A"< 0.2V and |
MIL. |
S |
— |
— |
— |
— |
mA |
|
(One Port — All |
CE"B" > VCC - 0.2V(5) |
|
L |
— |
— |
— |
— |
|
|
CMOS Level Inputs) |
SEMR = SEML > VCC - 0.2V |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
VIN>VCC - 0.2V or VIN<0.2V |
COM'L. |
S |
100 |
180 |
100 |
170 |
|
|
|
Active Port Outputs Open, |
|
L |
100 |
150 |
100 |
140 |
|
|
|
f = fMAX(3) |
|
|
|
|
|
|
|
NOTES: |
|
|
|
|
|
|
|
|
3190 tbl 09 |
1."X" in part numbers indicates power rating (S or L).
2.VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA(typ.)
3.At f = fMAX, address and I/Os are cycling at the maximum frequency read cycle of 1/tRC.
4.f = 0 means no address or control lines change.
5.Port "A" may be either left or right port. Port "B" is the opposite of port "A".
6.13 |
5 |
IDT7016S/L |
|
HIGH-SPEED 16K x 9 DUAL-PORT STATIC RAM |
MILITARY AND COMMERCIAL TEMPERATURE RANGES |
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)(Cont'd) (VCC = 5.0V ± 10%)
|
|
|
|
|
7016X20 |
7016X25 |
7016X35 |
|
|||
|
|
Test |
|
|
|
|
|
|
|
|
|
Symbol |
Parameter |
Condition |
Version |
|
Typ.(2) |
Max. |
Typ.(2) |
Max. |
Typ.(2) |
Max. |
Unit |
ICC |
Dynamic Operating |
CE = VIL, Outputs Open |
MIL. |
S |
— |
— |
155 |
340 |
150 |
300 |
mA |
|
Current |
SEM = VIH |
|
L |
— |
— |
155 |
280 |
150 |
250 |
|
|
|
f = fMAX(3) |
|
|
|
|
|
|
|
|
|
|
(Both Ports Active) |
COM’L. |
S |
160 |
290 |
155 |
265 |
150 |
250 |
|
|
|
|
|
|
L |
160 |
240 |
155 |
220 |
150 |
210 |
|
ISB1 |
Standby Current |
CEL = CER = VIH |
MIL. |
S |
— |
— |
16 |
80 |
13 |
80 |
mA |
|
(Both Ports — TTL |
SEMR = SEML = VIH |
|
L |
— |
— |
16 |
65 |
13 |
65 |
|
|
|
f = fMAX(3) |
|
|
|
|
|
|
|
|
|
|
Level Inputs) |
COM’L. |
S |
20 |
60 |
16 |
60 |
13 |
60 |
|
|
|
|
|
|
L |
20 |
50 |
16 |
50 |
13 |
50 |
|
ISB2 |
Standby Current |
CE"A"=VIL and CE"B"=VIH(5) |
MIL. |
S |
— |
— |
90 |
215 |
85 |
190 |
mA |
|
(One Port — TTL |
Active Port Outputs Open |
|
L |
— |
— |
90 |
180 |
85 |
160 |
|
|
Level Inputs) |
f = fMAX(3) |
|
|
|
|
|
|
|
|
|
|
COM’L. |
S |
95 |
180 |
90 |
170 |
85 |
155 |
|
||
|
|
SEMR = SEML = VIH |
|
L |
95 |
150 |
90 |
140 |
85 |
130 |
|
ISB3 |
Full Standby Current |
Both Ports CEL and |
MIL. |
S |
— |
— |
1.0 |
30 |
1.0 |
30 |
mA |
|
(Both Ports — All |
CER > VCC - 0.2V |
|
L |
— |
— |
0.2 |
10 |
0.2 |
10 |
|
|
CMOS Level Inputs) |
VIN > VCC - 0.2V or |
COM’L. |
S |
1.0 |
15 |
1.0 |
15 |
1.0 |
15 |
|
|
|
VIN < 0.2V, f = 0(4) |
|
L |
0.2 |
5 |
0.2 |
5 |
0.2 |
5 |
|
|
|
SEMR = SEML > VCC - 0.2V |
|
|
|
|
|
|
|
|
|
ISB4 |
Full Standby Current |
CE"A"< 0.2V and |
MIL. |
S |
— |
— |
85 |
200 |
80 |
175 |
mA |
|
(One Port — All |
CE"B" > VCC - 0.2V(5) |
|
L |
— |
— |
85 |
170 |
80 |
150 |
|
|
CMOS Level Inputs) |
SEMR = SEML > VCC - 0.2V |
|
|
|
|
|
|
|
|
|
|
|
VIN > VCC - 0.2V or |
COM’L. |
S |
90 |
155 |
85 |
145 |
80 |
135 |
|
|
|
VIN < 0.2V |
|
L |
90 |
130 |
85 |
120 |
80 |
110 |
|
|
|
Active Port Outputs Open, |
|
|
|
|
|
|
|
|
|
|
|
f = fMAX(3) |
|
|
|
|
|
|
|
|
|
NOTES: |
|
|
|
|
|
|
|
|
|
3190 tbl 10 |
1."X" in part numbers indicates power rating (S or L).
2.VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA(typ.)
3.At f = fMAX, address and I/Os are cycling at the maximum frequency read cycle of 1/tRC.
4.f = 0 means no address or control lines change.
5.Port "A" may be either left or right port. Port "B" is the opposite of port "A".
OUTPUT LOADS AND AC TEST CONDITIONS
Input Pulse Levels |
GND to 3.0V |
Input Rise/Fall Times(1) |
5ns Max. |
Input Timing Reference Levels |
1.5V |
Output Reference Levels |
1.5V |
Output Load |
Figures 1 and 2 |
|
|
NOTE: |
|
1. 3ns max for tAA = 12ns |
|
|
5V |
|
893Ω |
DATAOUT |
|
BUSY |
|
INT |
|
347Ω |
30pF |
Figure 1. AC Output Test Load
5V
893Ω
DATAOUT
347Ω 5pF
3190 drw 06
Figure 2. Output Test Load ( for tLZ, tHZ, tWZ, tOW)
Including scope and jig.
6.13 |
6 |