Integrated Device Technology Inc IDT54FCT139P, IDT54FCT139PB, IDT54FCT139SO, IDT54FCT139SOB, IDT54FCT139D Datasheet

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Integrated Device Technology Inc IDT54FCT139P, IDT54FCT139PB, IDT54FCT139SO, IDT54FCT139SOB, IDT54FCT139D Datasheet

IDT54/74FCT139/A/C

FAST CMOS DUAL 1-0F-4®DECODER WITH ENABLE

FAST CMOS DUAL

1-OF-4 DECODER

WITH ENABLE

Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

IDT54/74FCT139

IDT54/74FCT139A

IDT54/74FCT139C

FEATURES:

DESCRIPTION:

IDT54/74FCT139 equivalent to FASTspeed

IDT54/74FCT139A 35% faster than FAST

IDT54/74FCT139C 45% faster than FAST

Equivalent to FAST output drive over full temperature and voltage supply extremes

IOL = 48mA (commercial) and 32mA (military)

CMOS power levels (1mW typ. static)

TTL input and output level compatible

CMOS output level compatible

Substantially lower input current levels than FAST (5μA max.)

JEDEC standard pinout for DIP and LCC

Product available in Radiation Tolerant and Radiation Enhanced versions

Military product compliant to MIL-STD-883, Class B

The IDT54/74FCT139/A/C are dual 1-of-4 decoders built using an advanced dual metal CMOS technology. These devices have two independent decoders, each of which accept two binary weighted inputs (A0-A1) and provide four mutually exclusive active LOW outputs (O0-O3). Each decoder has an active LOW enable (E). When E is HIGH, all outputs are forced HIGH.

FUNCTIONAL BLOCK DIAGRAM

 

PIN CONFIGURATIONS

 

 

 

 

 

 

Ea

1

 

16

VCC

Ea

A0a A1a

Eb

A0b A1b

A0a

2

P16-1

15

Eb

 

 

 

 

A1a

3

14

A0b

 

 

 

 

D16-1

 

 

 

 

O0a

4

SO16-1

13

A1b

 

 

 

 

O1a

5

&

12

O0b

 

 

 

 

E16-1

 

 

 

 

O2a

6

11

O1b

 

 

 

 

 

 

 

 

 

O3a

7

 

10

O2b

 

 

 

 

GND

8

 

9

O3b

DIP/SOIC/CERPACK

TOP VIEW

 

 

 

INDEX

A0a

Ea

NC

VCC

Eb

 

O0a O1a O2a

O3a O0b O1b O2b

O3b

 

 

 

 

 

 

 

 

 

 

 

2605 cnv* 03

A1a

3

2

1

20 19

 

 

 

4

 

 

18

A0b

 

 

 

 

 

 

 

 

O0a

5

 

 

 

17

A1b

 

 

 

NC

6

L20-2

16

NC

 

 

 

O1a

7

 

 

 

15

O0b

 

 

 

O2a

8

 

 

 

14

O1b

 

 

 

 

9

10 11 12 13

 

 

 

 

 

O3a

GND

NC

O3b

O2b

 

LCC

TOP VIEW

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FAST is a trademark of National Semiconductor Co.

2605 cnv* 01

2605 cnv* 02

MILITARY AND COMMERCIAL TEMPERATURE RANGES

MAY 1992

 

 

 

©1992 Integrated Device Technology, Inc.

7.4

DSC 4613/3

 

7.4

1

1

 

 

 

IDT54/74FCT139/A/C

 

FAST CMOS DUAL 1-0F-4 DECODER WITH ENABLE

MILITARY AND COMMERCIAL TEMPERATURE RANGES

TRUTH TABLE(1)

 

 

 

 

PIN DESCRIPTION

 

Inputs

 

 

Outputs

 

Pin Names

Description

E

A0

A1

O0

O1

O2

O3

A0, A1

Address Inputs

H

X

X

H

H

H

H

E

Enable Input (Active LOW)

L

L

L

L

H

H

H

O0 - O3

Outputs (Active LOW)

L

H

L

H

L

H

H

 

2605 tbl 04

L

L

H

H

H

L

H

 

 

L

H

H

H

H

H

L

 

 

NOTE:

 

 

 

 

 

2605 tbl 05

 

 

1.H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care

ABSOLUTE MAXIMUM RATINGS(1)

Symbol

Rating

Commercial

Military

Unit

VTERM(2)

Terminal Voltage

–0.5 to +7.0

–0.5 to +7.0

V

 

with Respect to

 

 

 

 

GND

 

 

 

VTERM(3)

Terminal Voltage

–0.5 to VCC

–0.5 to VCC

V

 

with Respect to

 

 

 

 

GND

 

 

 

TA

Operating

0 to +70

–55 to +125

°C

 

Temperature

 

 

 

TBIAS

Temperature

–55 to +125

–65 to +135

°C

 

Under Bias

 

 

 

TSTG

Storage

–55 to +125

–65 to +150

°C

 

Temperature

 

 

 

PT

Power

0.5

0.5

W

 

Dissipation

 

 

 

IOUT

DC Output

120

120

mA

 

Current

 

 

 

NOTES:

 

 

 

2605 tbl 01

1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other

conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted.

2.Input and VCC terminals only.

3.Outputs and I/O terminals only.

CAPACITANCE (TA = +25°C, f = 1.0MHz)

Symbol

Parameter(1)

Conditions

Typ.

Max.

Unit

CIN

Input

VIN = 0V

6

10

pF

 

Capacitance

 

 

 

 

COUT

Output

VOUT = 0V

8

12

pF

 

Capacitance

 

 

 

 

NOTE:

 

 

 

2605 tbl 02

1. This parameter is measured at characterization but not tested.

7.4

2

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