Integrated Device Technology Inc IDT7026L20G, IDT7026S35JB, IDT7026S55GB, IDT7026S55J, IDT7026S55JB Datasheet

HIGH-SPEED	IDT7026S/L
16K x 16 DUAL-PORT
STATIC RAM

Integrated Device Technology, Inc.

FEATURES:

•True Dual-Ported memory cells which allow simultaneous access of the same memory location

•High-speed access

—Military: 25/35/55ns (max.)

—Commercial: 20/25/35/55ns (max.)

•Low-power operation

—IDT7026S

Active: 750mW (typ.) Standby: 5mW (typ.)

—IDT7026L

Active: 750mW (typ.) Standby: 1mW (typ.)

•Separate upper-byte and lower-byte control for multiplexed bus compatibility

•IDT7026 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device

•M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave

•On-chip port arbitration logic

•Full on-chip hardware support of semaphore signaling between ports

•Fully asynchronous operation from either port

•TTL-compatible, single 5V (±10%) power supply

•Available in 84-pin PGA and 84-pin PLCC

•Industrial temperature range (–40°C to +85°C) is available, tested to military electrical specifications

FUNCTIONAL BLOCK DIAGRAM

R/WL				R/WR
UBL				UBR
LBL				LBR
CEL				CER
OEL				OER
I/O8L-I/O15L		I/O	I/O	I/O8R-I/O15R
I/O0L-I/O7L		Control	Control	I/O0R-I/O7R
(1,2)				(1,2)
BUSYL				BUSYR
A13L	Address	MEMORY	Address	A13R
A0L	Decoder	ARRAY	Decoder	A0R
	1 4		1 4
	CEL	ARBITRATION	CER
		SEMAPHORE
		LOGIC
SEML		M/S		SEMR
				2939 drw 01
NOTES:
1. (MASTER): BUSY is output; (SLAVE): BUSY is input.
2. BUSY outputs are non-tri-stated push-pull.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES				OCTOBER 1996
©1996 Integrated Device Technology, Inc.	For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.			DSC 2939/3
		6.17		1

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM	MILITARY AND COMMERCIAL TEMPERATURE RANGES

DESCRIPTION:

The IDT7026 is a high-speed 16K x 16 Dual-Port Static RAM. The IDT7026 is designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE DualPort RAM for 32-bit-or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic.

This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in

memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.

Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 750mW of power.

The IDT7026 is packaged in a ceramic 84-pin PGA, and a 84-pin PLCC. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.

PIN CONFIGURATIONS (1,2)

INDEX

I/O7L

I/O6L

I/O5L

I/O4L

I/O3L

I/O2L

GND

I/O1L

I/O0L

OEL

CCV

R/WL SEML

CEL

UBL

LBL

13LA

12LA

11LA

10LA

A9L

I/O8L

11 10

9

8

7

6

5

4

3

2

1

84 83 82 81 80 79 78 77 76 75

A8L

12

74

I/O9L

13

73

A7L

I/O10L

14

72

A6L

I/O11L

15

71

A5L

I/O12L

16

70

A4L

I/O13L

17

69

A3L

GND

18

68

A2L

A1L

I/O14L

19

67

A0L

I/O15L

20

IDT7026

66

VCC

21

J84-1

65

BUSYL

GND

22

84-PIN PLCC

64

GND

I/O0R

23

TOP VIEW(3)

63

M/S

I/O1R

24

62

BUSY

R

I/O2R

25

61

A0R

VCC

26

60

A1R

I/O3R

27

59

A2R

I/O4R

28

58

A3R

I/O5R

29

57

A4R

I/O6R

30

56

A5R

I/O7R

31

55

A6R

I/O8R

32

54

A7R

33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

I/O9R

I/O10R I/O11R

I/O12R

I/O13R

I/O14R

GND

I/O15R

ROE

R/WR

GND

SEMR CER

UBR

LBR

A13R

A12R

A11R

A10R

A9R

A8R

2939 drw 02

NOTES:

1.All Vcc pins must be connected to the power supply.

2.All GND pins must be connected to the ground supply.

3.This text does not indicate orientation of the actual part-marking.

6.17

2

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM										MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS (CONT'D) (1,2)
	63	61	60	58	55		54	51		48		46	45	42
11	I/O7L	I/O5L	I/O4L	I/O2L	I/O0L		OEL	SEML		LBL		A12L	A11L	A8L
	66	64	62	59	56		49	50		47		44	43	40
10	I/O10L	I/O8L	I/O6L	I/O3L	I/O1L		UBL	CEL		A13L		A10L	A9L	A6L
	67	65			57		53	52					41	39
09	I/O11L	I/O9L			GND		VCC	R/WL					A7L	A5L
	69	68											38	37
08	I/O13L	I/O12L											A4L	A3L
	72	71	73									33	35	34
07	I/O15L	I/O14L	VCC									BUSYL	A1L	A0L
							IDT7026
							G84-3
	75	70	74									32	31	36
06	I/O0R	GND	GND			84-PIN PGA						GND	M/S	A2L
					TOP VIEW(3)
	76	77	78									28	29	30
05	I/O1R	I/O2R	VCC									A1R	A0R	BUSYR
	79	80											26	27
04	I/O3R	I/O4R											A3R	A2R
	81	83			7		11	12					23	25
03	I/O5R	I/O7R			GND		GND	SEM					A6R	A4R
									R
	82	1	2	5	8		10	14		17		20	22	24
02	I/O6R	I/O9R	I/O10R	I/O13R	I/O15R		W	UB	R	A	12R	A9R	A7R	A5R
							R/ R
	84	3	4	6	9		15	13		16		18	19	21
01	I/O8R	I/O11R	I/O12R	I/O14R	OER		LBR	CER		A13R		A11R	A10R	A8R
	A	B	C	D	E		F	G		H		J	K	L
														2939 drw 03
Index

NOTES:

1.All VCC pins must be connected to power supply.

2.All GND pins must be connected to ground supply.

3.This text does not indicate orientation of the actual part-marking.

PIN NAMES

Left Port		Right Port	Names
CEL		CER	Chip Enable
R/WL		R/WR	Read/Write Enable
OEL		OER	Output Enable
A0L – A13L		A0R – A13R	Address
I/O0L – I/O15L		I/O0R – I/O15R	Data Input/Output
SEML		SEMR	Semaphore Enable
UBL		UBR	Upper Byte Select
LBL		LBR	Lower Byte Select
BUSYL		BUSYR	Busy Flag
	M/S		Master or Slave Select
	VCC		Power
	GND		Ground
			2939 tbl 01

RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE

	Ambient
Grade	Temperature	GND	VCC
Military	–55°C to +125°C	0V	5.0V ± 10%
Commercial	0°C to +70°C	0V	5.0V ± 10%

2939 tbl 02

6.17

3

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM	MILITARY AND COMMERCIAL TEMPERATURE RANGES

TRUTH TABLE I – NON-CONTENTION READ/WRITE CONTROL

		Inputs(1)				Outputs
CE	R/W	OE	UB	LB	SEM	I/O8-15	I/O0-7	Mode
H	X	X	X	X	H	High-Z	High-Z	Deselected: Power-Down
X	X	X	H	H	H	High-Z	High-Z	Both Bytes Deselected
L	L	X	L	H	H	DATAIN	High-Z	Write to Upper Byte Only
L	L	X	H	L	H	High-Z	DATAIN	Write to Lower Byte Only
L	L	X	L	L	H	DATAIN	DATAIN	Write to Both Bytes
L	H	L	L	H	H	DATAOUT	High-Z	Read Upper Byte Only
L	H	L	H	L	H	High-Z	DATAOUT	Read Lower Byte Only
L	H	L	L	L	H	DATAOUT	DATAOUT	Read Both Bytes
X	X	H	X	X	X	High-Z	High-Z	Outputs Disabled
NOTE:								2939 tbl 03
1. A0L — A13L ¹ A0R — A13R.
								(1)
TRUTH TABLE II – SEMAPHORE READ/WRITE CONTROL
		Inputs				Outputs
CE	R/W	OE	UB	LB	SEM	I/O8-15	I/O0-7	Mode
H	H	L	X	X	L	DATAOUT	DATAOUT	Read Data in Semaphore Flag
X	H	L	H	H	L	DATAOUT	DATAOUT	Read Data in Semaphore Flag
H		X	X	X	L	DATAIN	DATAIN	Write I/O0 into Semaphore Flag
X		X	H	H	L	DATAIN	DATAIN	Write I/O0 into Semaphore Flag
L	X	X	L	X	L	—	—	Not Allowed
L	X	X	X	L	L	—	—	Not Allowed
NOTE:								2939 tbl 04

1. There are eight semaphore flags written to via I/O0 and read from all I/O's (I/O0-I/O15). These eight semaphores are addressed by A0 - A2.

ABSOLUTE MAXIMUM RATINGS(1)

Symbol	Rating	Commercial	Military	Unit
VTERM(2)	Terminal Voltage	–0.5 to +7.0	–0.5 to +7.0	V
	with Respect
	to GND
TA	Operating	0 to +70	–55 to +125	°C
	Temperature
TBIAS	Temperature	–55 to +125	–65 to +135	°C
	Under Bias
TSTG	Storage	–55 to +125	–65 to +150	°C
	Temperature
IOUT	DC Output	50	50	mA
	Current
NOTES:			2939 tbl 05

1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

2.VTERM must not exceed Vcc + 0.5V for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM > Vcc + 0.5V.

RECOMMENDED DC OPERATING

CONDTIONS

	Symbol	Parameter	Min.	Typ.	Max.	Unit
	VCC	Supply Voltage	4.5	5.0	5.5	V
	GND	Supply Voltage	0	0	0	V
	VIH	Input High Voltage	2.2	—	6.0(2)	V
	VIL	Input Low Voltage	–0.5(1)	—	0.8	V
NOTES:					2939 tbl 06

1.VIL > -1.5V for pulse width less than 10ns.

2.VTERM must not exceed Vcc + 0.5V.

CAPACITANCE(1) (TA = +25°C, f = 1.0MHz)

Symbol	Parameter	Conditions(2)	Max.		Unit
CIN	Input Capacitance	VIN = 3dv	9		pF
COUT	Output	VOUT = 3dv	10		pF
	Capacitance
NOTES:				2939 tbl 07

1.This parameter is determined by device characterization but is not production tested.

2.3dV represents the interpolated capacitance when the input and output signals switch from 0V to 3V or from 3V to 0V.

6.17

4

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM	MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER THE

OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE (VCC = 5.0V ± 10%)

			IDT7026S		IDT7026L
Symbol	Parameter	Test Conditions	Min.	Max.	Min.	Max.	Unit
|ILI|	Input Leakage Current(1)	VCC = 5.5V, VIN = 0V to VCC	—	10	—	5	μA
|ILO|	Output Leakage Current	CE = VIH, VOUT = 0V to VCC	—	10	—	5	μA
VOL	Output Low Voltage	IOL = 4mA	—	0.4	—	0.4	V
VOH	Output High Voltage	IOH = –4mA	2.4	—	2.4	—	V
NOTE:							2939 tbl 08

1. At Vcc = 2.0V, input leakages are undefined.

DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)					(VCC = 5.0V ± 10%)
						7026X20		7026X25
		Test				Com'l. Only
Symbol	Parameter	Condition		Version		Typ.(2)	Max.	Typ.(2)	Max.	Unit
ICC	Dynamic Operating	CE = VIL, Outputs Open		MIL.	S	—	—	170	345	mA
	Current	SEM = VIH			L	—	—	170	305
		f = fMAX(3)
	(Both Ports Active)			COM’L.	S	180	315	170	305
					L	180	275	170	265
ISB1	Standby Current	CER = CEL = VIH		MIL.	S	—	—	25	100	mA
	(Both Ports — TTL	SEMR = SEML = VIH			L	—	—	25	80
		f = fMAX(3)
	Level Inputs)			COM’L.	S	30	85	25	85
					L	30	60	25	60
ISB2	Standby Current	CE"A" = VIL and CE"B" = VIH(5)		MIL.	S	—	—	105	230	mA
	(One Port — TTL	Active Port Outputs Open,			L	—	—	105	200
	Level Inputs)	f = fMAX(3)
				COM’L.	S	115	210	105	200
		SEMR = SEML = VIH			L	115	180	105	170
ISB3	Full Standby Current	Both Ports CEL and		MIL.	S	—	—	1.0	30	mA
	(Both Ports — All	CER > VCC - 0.2V			L	—	—	0.2	10
	CMOS Level Inputs)	VIN > VCC - 0.2V or		COM’L.	S	1.0	15	1.0	15
		VIN < 0.2V, f = 0(4)			L	0.2	5	0.2	5
		SEMR = SEML > VCC - 0.2V
ISB4	Full Standby Current	CE"A" < 0.2V and		MIL.	S	—	—	100	200	mA
	(One Port — All	CE"B" > VCC - 0.2V(5)			L	—	—	100	175
	CMOS Level Inputs)	SEMR = SEML > VCC - 0.2V
		VIN > VCC - 0.2V or		COM’L.	S	110	185	100	170
		VIN < 0.2V			L	110	160	100	145
		Active Port Outputs Open,
		f = fMAX(3)
NOTES:									2939 tbl 09

1."X" in part numbers indicates power rating (S or L).

2.VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA (Typ.)

3.At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1 / tRC, and using “AC Test Conditions” of input levels of GND to 3V.

4.f = 0 means no address or control lines change.

5.Port "A" may be either left or right port. Port "B" is the opposite from port "A".

6.17

5

IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM	MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER THE

OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)(Con't.) (VCC = 5.0V ± 10%)

					7026X35		7026X55
		Test
Symbol	Parameter	Condition	Version		Typ.(2)	Max.	Typ.(2)	Max.	Unit
ICC	Dynamic Operating	CE = VIL, Outputs Open	MIL.	S	160	335	150	310	mA
	Current	SEM = VIH		L	160	295	150	270
		f = fMAX(3)
	(Both Ports Active)		COM’L.	S	160	295	150	270
				L	160	255	150	230
ISB1	Standby Current	CEL = CER = VIH	MIL.	S	20	100	13	100	mA
	(Both Ports — TTL	SEMR = SEML = VIH		L	20	80	13	80
		f = fMAX(3)
	Level Inputs)		COM’L.	S	20	85	13	85
				L	20	60	13	60
ISB2	Standby Current	CE"A"=VIL and CE"B"=VIH(5)	MIL.	S	95	215	85	195	mA
	(One Port — TTL	Active Port Outputs Open,		L	95	185	85	165
	Level Inputs)	f = fMAX(3)
			COM’L.	S	95	185	85	165
		SEMR = SEML = VIH		L	95	155	85	135
ISB3	Full Standby Current	Both Ports CEL and	MIL.	S	1.0	30	1.0	30	mA
	(Both Ports — All	CER > VCC - 0.2V		L	0.2	10	0.2	10
	CMOS Level Inputs)	VIN > VCC - 0.2V or	COM’L.	S	1.0	15	1.0	15
		VIN < 0.2V, f = 0(4)		L	0.2	5	0.2	5
		SEMR = SEML >VCC - 0.2V
ISB4	Full Standby Current	CE"A" < 0.2V and	MIL.	S	90	190	80	175	mA
	(One Port — All	CE"B" > VCC - 0.2V(5)		L	90	165	80	150
	CMOS Level Inputs)	SEMR = SEML >VCC - 0.2V
		VIN > VCC - 0.2V or	COM’L.	S	90	160	80	135	mA
		VIN < 0.2V		L	90	135	80	110
		Active Port Outputs Open,
		f = fMAX(3)
NOTES:								2939 tbl 10

1."X" in part numbers indicates power rating (S or L).

2.VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA (Typ.)

3.At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/ tRC, and using “AC Test Conditions” of input levels of GND to 3V.

4.f = 0 means no address or control lines change.

5.Port "A" may be either left or right port. Port "B" is the opposite from port "A".

6.17

6