128Kx8 3.3V MONOLITHIC SRAM
FEATURES
■Access Times 15, 17, 20, 25, 35ns
■Revolutionary, Center Power/Ground Pinout JEDEC Approved
•32 lead Ceramic SOJ (Package 101)
•32 lead Ceramic Flat Pack (Package 220)**
■Evolutionary, Corner Power/Ground Pinout JEDEC Approved
•32 pin Ceramic DIP (Package 300)
■32 pin, Rectangular Ceramic Leadless Chip Carrier (Package 601)
WMS128K8V-XXX
PRELIMINARY*
■MIL-STD-883 Compliant Devices Available
■Commercial, Industrial and Military Temperature Range
■3.3 Volt Power Supply
■Low Power CMOS
■TTL Compatible Inputs and Outputs
*This data sheet describes a product under development, not fully characterized, and is subject to change without notice.
**Package under developement.
REVOLUTIONARY PINOUT |
EVOLUTIONARY PINOUT |
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32 CSOJ (DR) |
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32 DIP (C) |
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32 FLATPACK (FR)** |
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TOP VIEW |
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TOP VIEW |
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A0 |
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1 |
32 |
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A16 |
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A1 |
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2 |
31 |
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A15 |
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A2 |
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3 |
30 |
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A14 |
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A3 |
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4 |
29 |
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A13 |
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CS |
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5 |
28 |
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OE |
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I/O1 |
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6 |
27 |
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I/O8 |
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I/O2 |
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7 |
26 |
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I/O7 |
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VCC |
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8 |
25 |
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VSS |
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VSS |
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9 |
24 |
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VCC |
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I/O3 |
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10 |
23 |
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I/O6 |
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I/O4 |
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11 |
22 |
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I/O5 |
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WE |
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12 |
21 |
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A12 |
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A4 |
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13 |
20 |
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A11 |
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A5 |
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14 |
19 |
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A10 |
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A6 |
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15 |
18 |
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A9 |
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A7 |
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16 |
17 |
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A8 |
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PIN DESCRIPTION |
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A0-16 |
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Address Inputs |
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I/O0-7 |
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Data Input/Outputs |
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Chip Select |
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CS |
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Output Enable |
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OE |
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Write Enable |
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WE |
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VCC |
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+3.3V Power |
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VSS |
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Ground |
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NC |
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Not Connected |
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32 CLCC
TOP VIEW
June 2000 Rev. 3 |
1 |
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 |
WMS128K8V-XXX
ABSOLUTE MAXIMUM RATINGS
Parameter |
Symbol |
Min |
Max |
Unit |
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Operating Temperature |
TA |
-55 |
+125 |
° C |
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Storage Temperature |
TSTG |
-65 |
+150 |
° C |
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Signal Voltage Relative to GND |
VG |
-0.5 |
Vcc+0.5 |
V |
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Junction Temperature |
TJ |
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150 |
° C |
Supply Voltage |
VCC |
-0.5 |
5.5 |
V |
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RECOMMENDED OPERATING CONDITIONS
Parameter |
Symbol |
Min |
Max |
Unit |
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Supply Voltage |
VCC |
3.0 |
3.6 |
V |
Input High Voltage |
VIH |
2.2 |
VCC + 0.3 |
V |
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Input Low Voltage |
VIL |
-0.3 |
+0.8 |
V |
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Operating Temp. (Mil.) |
TA |
-55 |
+125 |
° C |
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TRUTH TABLE
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CS |
OE |
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WE |
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Mode |
Data I/O |
Power |
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H |
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X |
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X |
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Standby |
High Z |
Standby |
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L |
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L |
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H |
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Read |
Data Out |
Active |
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L |
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X |
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L |
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Write |
Data In |
Active |
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L |
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H |
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H |
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Out Disable |
High Z |
Active |
CAPACITANCE
(TA = +25° C)
Parameter |
Symbol |
Condition |
Max |
Unit |
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Input capacitance |
CIN |
VIN = 0V, f = 1.0MHz |
20 |
pF |
Output capacitance |
COUT |
VOUT = 0V, f = 1.0MHz |
20 |
pF |
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This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(VCC = 3.3V ± 0.3V, VSS = 0V, TA = -55° C to +125° C)
Parameter |
Sym |
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Conditions |
Min |
Max |
Units |
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Input Leakage Current |
ILI |
VCC = 3.3, VIN = GND to VCC |
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10 |
µ A |
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Output Leakage Current |
ILO |
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= VIH, |
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= VIH, VOUT = GND to VCC |
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10 |
µ A |
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CS |
OE |
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Operating Supply Current (x 32 Mode) |
ICC |
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= VIL, |
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= VIH, f = 5MHz, VCC = 3.3 |
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120 |
mA |
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CS |
OE |
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Standby Current |
ISB |
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= VIH, |
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= VIH, f = 5MHz, VCC = 3.3 |
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8 |
mA |
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CS |
OE |
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Output Low Voltage |
VOL |
IOL = 8mA |
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0.4 |
V |
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Output High Voltage |
VOH |
IOH = -4.0mA |
2.4 |
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V |
AC TEST CIRCUIT
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I OL |
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Current Source |
D.U.T. |
VZ ≈ 1.5V |
Ceff = 50 pf |
(Bipolar Supply) |
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IOH
Current Source
AC TEST CONDITIONS
Parameter |
Typ |
Unit |
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Input Pulse Levels |
VIL = 0, VIH = 2.5 |
V |
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Input Rise and Fall |
5 |
ns |
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Input and Output Reference Level |
1.5 |
V |
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Output Timing Reference Level |
1.5 |
V |
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NOTES:
VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 Ω .
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance.
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 |
2 |
WMS128K8V-XXX
AC CHARACTERISTICS
(VCC = 3.3V, TA = -55° C to +125° C)
Parameter |
Symbol |
-15 |
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-17 |
-20 |
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-25 |
-35 |
Units |
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Read Cycle |
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Min |
Max |
Min |
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Max |
Min |
Max |
Min |
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Max |
Min Max |
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Read Cycle Time |
tRC |
15 |
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17 |
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20 |
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25 |
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35 |
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ns |
Address Access Time |
tAA |
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15 |
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17 |
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20 |
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25 |
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35 |
ns |
Output Hold from Address Change |
tOH |
0 |
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0 |
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0 |
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0 |
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0 |
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ns |
Chip Select Access Time |
tACS |
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15 |
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17 |
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20 |
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25 |
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35 |
ns |
Output Enable to Output Valid |
tOE |
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10 |
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11 |
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12 |
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15 |
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20 |
ns |
Chip Select to Output in Low Z |
tCLZ1 |
5 |
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5 |
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5 |
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5 |
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5 |
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ns |
Output Enable to Output in Low Z |
tOLZ1 |
5 |
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5 |
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5 |
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5 |
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5 |
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ns |
Chip Disable to Output in High Z |
tCHZ1 |
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8 |
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9 |
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10 |
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12 |
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15 |
ns |
Output Disable to Output in High Z |
tOHZ1 |
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8 |
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9 |
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10 |
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12 |
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15 |
ns |
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(VCC = 3.3V, TA = -55° C to +125° C)
Parameter |
Symbol |
-15 |
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-17 |
-20 |
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-25 |
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-35 |
Units |
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Write Cycle |
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Min |
Max |
Min |
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Max |
Min |
Max |
Min |
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Max |
Min |
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Max |
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Write Cycle Time |
tWC |
15 |
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17 |
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20 |
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25 |
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35 |
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ns |
Chip Select to End of Write |
tCW |
13 |
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14 |
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15 |
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20 |
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30 |
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ns |
Address Valid to End of Write |
tAW |
13 |
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14 |
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15 |
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20 |
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30 |
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ns |
Data Valid to End of Write |
tDW |
10 |
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11 |
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12 |
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15 |
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18 |
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ns |
Write Pulse Width |
tWP |
13 |
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14 |
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15 |
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20 |
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30 |
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ns |
Address Setup Time |
tAS |
0 |
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0 |
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0 |
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0 |
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0 |
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ns |
Address Hold Time |
tAH |
0 |
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0 |
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0 |
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0 |
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0 |
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ns |
Output Active from End of Write |
tOW1 |
5 |
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5 |
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5 |
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5 |
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5 |
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ns |
Write Enable to Output in High Z |
tWHZ1 |
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8 |
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9 |
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10 |
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10 |
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15 |
ns |
Data Hold Time |
tDH |
0 |
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0 |
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0 |
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0 |
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0 |
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ns |
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1. This parameter is guaranteed by design but not tested.
3 |
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 |