νAccess Times of 35ns (SRAM) and 70ns (FLASH)
νAccess Times of 70ns (SRAM) and 120ns (FLASH)
νPackaging
•66-pin, PGA Type, 1.075 inch square HIP, Hermetic Ceramic HIP (Package 400)
•66-pin, PGA Type, 1.185 inch square HIP, Hermetic Ceramic HIP (Package 401)
•68 lead, Hermetic CQFP (G1U), 22.4mm (0.880 inch) square (Package 519). Designed to fit JEDEC 68 lead 0.990” CQFJ footprint (Fig. 2)
ν128Kx16 SRAM
ν128Kx16 5V FLASH
νOrganized as 128Kx16 of SRAM and 128Kx16 of Flash Memory with separate Data Buses
νBoth blocks of memory are User Configurable as 256Kx8
νLow Power CMOS
νCommercial, Industrial and Military Temperature Ranges
νTTL Compatible Inputs and Outputs
νBuilt-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation
νWeight
•WSF128K16-XHX - 13 grams typical
•WSF128K16-H1X - 13 grams typical
•WSF128K16-XG1UX - 5 grams typical
ν10,000 Erase/Program Cycles
νSector Architecture
•8 equal size sectors of 16K bytes each
•Any combination of sectors can be concurrently erased.
Also supports full chip erase
ν5 Volt Programming; 5V ± 10% Supply
νEmbedded Erase and Program Algorithms
νHardware Write Protection
νPage Program Operation and Internal Program Control Time.
Note: For programming information refer to Flash Programming 1M5 Application Note.
FIG.1 |
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FD0-15 |
FlashDataInputs/Outputs |
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SD0-15 |
SRAMDataInputs/Outputs |
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A0-16 |
AddressInputs |
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SWE1-2 |
SRAM Write Enable |
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SCS1-2 |
SRAM Chip Selects |
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OE |
OutputEnable |
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VCC |
Power Supply |
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GND |
Ground |
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NC |
Not Connected |
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FWE1-2 |
Flash Write Enable |
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FCS1-2 |
Flash Chip Select |
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May 2001 Rev. 5 |
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White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com |
FIG. 2
The WEDC 68 lead G1U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G1U has the TCE and lead inspection advantage of the CQFP form.
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FD0-15 |
FlashDataInputs/Outputs |
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SD0-15 |
SRAMDataInputs/Outputs |
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A0-16 |
AddressInputs |
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SWE1-2 |
SRAM Write Enable |
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SRAM Chip Selects |
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SCS1-2 |
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OutputEnable |
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OE |
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VCC |
Power Supply |
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GND |
Ground |
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NC |
Not Connected |
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Flash Write Enable |
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FWE |
1-2 |
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Flash Chip Select |
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FCS1-2 |
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 |
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! |
# |
! |
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Operating Temperature |
T A |
-55 |
+125 |
°C |
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StorageTemperature |
TSTG |
-65 |
+150 |
°C |
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Signal Voltage Relative to GND |
VG |
-0.5 |
7.0 |
V |
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Junction Temperature |
TJ |
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150 |
°C |
SupplyVoltage |
VCC |
-0.5 |
7.0 |
V |
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Flash Data Retention |
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10 years |
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Flash Endurance (write/erase cycles) |
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10,000 |
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NOTES:
1. Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability.
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! |
# |
! |
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SupplyVoltage |
VCC |
4.5 |
5.5 |
V |
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Input High Voltage |
VIH |
2.2 |
VCC + 0.3 |
V |
Input Low Voltage |
VIL |
-0.5 |
+0.8 |
V |
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$% |
$& |
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H |
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X |
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X |
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Standby |
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High Z |
Standby |
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L |
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L |
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H |
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Read |
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Data Out |
Active |
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L |
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H |
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H |
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Read |
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High Z |
Active |
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L |
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X |
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L |
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Write |
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Data In |
Active |
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" |
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! ! |
# |
! |
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COE |
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VIN = 0V, f = 1.0MHz |
50 |
pF |
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OE |
Capacitance |
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F/S |
WE |
1-2 Capacitance |
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CWE |
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VIN = 0V, f = 1.0MHz |
20 |
pF |
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F/S |
CS |
1-2 Capacitance |
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CCS |
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VIN = 0V, f = 1.0MHz |
20 |
pF |
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SD0-15/FD0-15 Capacitance |
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CI/O |
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VIN = 0V, f = 1.0MHz |
20 |
pF |
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A0 - A16 Capacitance |
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CAD |
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VIN = 0V, f = 1.0MHz |
50 |
pF |
This parameter is guaranteed by design but not tested.
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! ! " |
! |
# |
! |
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Input Leakage Current |
ILI |
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VCC = 5.5, VIN = GND to VCC |
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10 |
µA |
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OutputLeakageCurrent |
IL O |
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= VIH, |
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= VIH, VOUT = GND to VCC |
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10 |
µA |
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SCS |
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OE |
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SRAM Operating Supply Current x 16 Mode |
ICCx16 |
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= VIL, |
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= |
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= VIH, f = 5MHz, VCC = 5.5 |
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360 |
mA |
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SCS |
OE |
FCS |
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Standby Current |
ISB |
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FCS |
= |
SCS |
= VIH, |
OE |
= VIH, f = 5MHz, VCC = 5.5 |
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40 |
mA |
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SRAM Output Low Voltage |
VOL |
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IOL = 2.1mA, VCC = 4.5 |
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0.4 |
V |
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SRAM Output High Voltage |
VOH |
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IOH = -1.0mA, VCC = 4.5 |
2.4 |
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V |
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Flash VCC Active Current for Read (1) |
ICC1 |
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= VIL, |
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= |
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= VIH |
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100 |
mA |
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FCS |
OE |
SCS |
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Flash VCC Active Current for Program or |
ICC2 |
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FCS |
= VIL, |
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OE |
= |
SCS |
= VIH |
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130 |
mA |
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Erase (2) |
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Flash Output Low Voltage |
VOL |
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IOL = 8.0mA, VCC = 4.5 |
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0.45 |
V |
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Flash Output High Voltage |
VOH1 |
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IOH = -2.5 mA, VCC = 4.5 |
0.85 x VCC |
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V |
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Flash Output High Voltage |
VOH2 |
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IOH = -100 µA, VCC = 4.5 |
VCC -0.4 |
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V |
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Flash Low VCC Lock Out Voltage |
VLKO |
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3.2 |
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V |
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NOTES:
1.The ICC current listed includes both the DC operating current and the frequency dependent component (@ 5 MHz). The frequency component typically is less than 2 mA/MHz, with OE at VIH.
2.ICC active while Embedded Algorithm (program or erase) is in progress.
3.DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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()* |
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(+, |
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$ - |
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! # |
! # |
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Read Cycle Time |
tRC |
35 |
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70 |
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ns |
Address Access Time |
tAA |
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35 |
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70 |
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OutputHoldfromAddressChange |
tOH |
0 |
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3 |
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ns |
Chip Select Access Time |
tACS |
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35 |
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70 |
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Output Enable to Output Valid |
tOE |
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20 |
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35 |
ns |
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Chip Select to Output in Low Z |
tCLZ1 |
3 |
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3 |
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ns |
Output Enable to Output in Low Z |
tOLZ1 |
0 |
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0 |
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Chip Disable to Output in High Z |
tCHZ1 |
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20 |
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25 |
ns |
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OutputDisabletoOutputinHighZ |
tOHZ1 |
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20 |
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25 |
ns |
1. This parameter is guaranteed by design but not tested.
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()* |
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(+, |
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!$ - |
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! # |
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Write Cycle Time |
tWC |
35 |
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70 |
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Chip Select to End of Write |
tCW |
25 |
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60 |
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ns |
Address Valid to End of Write |
tAW |
25 |
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60 |
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Data Valid to End of Write |
tDW |
20 |
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30 |
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ns |
Write Pulse Width |
tWP |
25 |
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50 |
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ns |
Address Setup Time |
tAS |
0 |
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5 |
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ns |
Address Hold Time |
tAH |
0 |
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5 |
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Output Active from End of Write |
tOW1 |
4 |
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5 |
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Write Enable to Output in High Z |
tWHZ1 |
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20 |
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25 |
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Data Hold from Write Time |
tDH |
0 |
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0 |
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ns |
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1. This parameter is guaranteed by design but not tested.
# |
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. |
! |
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Input Pulse Levels |
VIL = 0, VIH = 3.0 |
V |
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Input Rise and Fall |
5 |
ns |
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Input and Output Reference Level |
1.5 |
V |
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Output Timing Reference Level |
1.5 |
V |
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Notes: |
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VZ is programmable from -2V to +7V. |
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IOL & IOH programmable from 0 to 16mA. |
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Tester Impedance Z0 = 75W. |
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VZ is typically the midpoint of VOH and VOL. |
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IOL & IOH are adjusted to simulate a typical resistive load circuit. |
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ATE tester includes jig capacitance. |
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White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 |
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$ / ' |
'" |
'
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com