White Electronic Designs EDI8F321024C20MZC, EDI8F321024C20MNC, EDI8F321024C20MMC, EDI8F321024C15MZC, EDI8F321024C15MNC Datasheet

1

White Electronic Designs Corporation  [phone]  www.whiteedc.com

Aug. 2002 Rev. 8A

ECO #15521

EDI8F321024C

FEATURES

PIN CONFIGURATIONS AND BLOCK DIAGRAM

n 1024Kx32 bit CMOS Static RAM

 Access Times: 15, 20, and 25ns

 Individual Byte Selects

 Fully Static, No Clocks

 TTL Compatible I/O

n High Density Package

 72 Pin ZIP, No. 175

 72 lead SIMM, No. 176 (Angle)

 72 lead SIMM, No. 356 (Straight)

 Common Data Inputs and Outputs

n Single +5V (±10%) Supply Operation

PIN NAMES

1024Kx32 Static RAM CMOS, High Speed Module

AØ-A19 Address Inputs

EØ-E3 Chip Enables

W Write Enable

G Output Enable

DQØ-DQ31 Common Data

Input/Output

VCC Power (+5V±10%)

VSS Ground

NC No Connection

FIG. 1

DESCRIPTION

8F321024C Pin Config.

0E

1E

2E

3E

8F321024C Blk Dia.

The EDI8F321024C is a high speed 32 megabit Static RAM

module organized as 1024K words by 32 bits. This module is

constructed from eight 1024Kx4 Static RAMs in SOJ packages

on an epoxy laminate (FR4) board.

Four chip enables (EØ-E3) are used to independently enable

the four bytes. Reading or writing can be executed on individual

bytes or any combination of multiple bytes through proper use of

selects.

The EDI8F321024C is offered in 72 pin ZIP and 72 lead SIMM

packages, which enable 32 megabits of memory to be placed in

less than 1.3 square inches of board space.

All inputs and outputs are TTL compatible and operate from a

single 5V supply. Fully asynchronous circuitry requires no

clocks or refreshing for operation and provides equal access and

cycle times for ease of use.

Pins PD1- PD4, are used to identify module memory density in

applications where alternate modules can be interchanged.

2

White Electronic Designs Corporation  [phone]  www.whiteedc.com

Aug. 2002 Rev. 8A

ECO #15521

EDI8F321024C

ABSOLUTE MAXIMUM RATINGS*

RECOMMENDED DC OPERATING CONDITIONS

DC ELECTRICAL CHARACTERISTICS

CAPACITANCE

TRUTH TABLE

(f=1.0MHz, VIN=VCC or VSS)

AC TEST CONDITIONS

*Stress greater than those listed under "Absolute Maximum Ratings" may cause

permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions greater than those indicated

in the operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect reliability.

(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)

*Typical: TA = 25°C, VCC = 5.0V

These parameters are sampled, not 100% tested.

E W G Mode Output Power

H X X Standby HIGH Z ICC2/ICC3

L H L Read DOUT ICC1

L L X Write DIN ICC1

Output

L H H Deselect HIGH Z ICC1

Parameter Sym Max Unit

Address Lines CI 60 pF

Data Lines CD/Q 20 pF

Chip Enable Line CC 20 pF

Write Line CN 60 pF

Voltage on any pin relative to VSS -0.5V to 7.0V

Operating Temperature TA (Ambient)

Commercial 0°C to +70°C

Industrial -40°C to +85°C

Storage Temperature, Plastic -55°C to +125°C

Power Dissipation 7.0 Watts

Output Current 20 mA

Input Pulse Levels VSS to 3.0V

Input Rise and Fall Times 5ns

Input and Output Timing Levels 1.5V

Output Load 1TTL, CL = 30pF

Parameter Sym Min Typ Max Units

Supply Voltage VCC 4.5 5.0 5.5 V

Supply Voltage VSS 0 0 0 V

Input High Voltage VIH 2.2 -- 6.0 V

Input Low Voltage VIL -0.3 -- 0.8 V

Parameter Sym Conditions Min Typ Max Units

Operating Power Supply Current ICC1 W, E = VIL, II/O = 0mA, Min Cycle 1280 mA

Standby (TTL) Power Supply Current ICC2 E ³ VIH, VIN £ VIL or VIN ³ VIH 480 mA

Full Standby Power Supply Current ICC3 E ³ VCC-0.2V 80 mA

CMOS VIN ³ VCC-0.2V or VIN £ 0.2V

Input Leakage Current ILI VIN = 0V to VCC -- -- ±80 µA

Output Leakage Current ILO V I/O = 0V to VCC -- -- ±20 µA

Output High Voltage VOH IOH = -4.0mA 2.4 -- -- V

Output Low Voltage VOL IOL = 8.0mA -- -- 0.4 V