White Electronic Designs WEDPS512K32-20BM, WEDPS512K32-20BI, WEDPS512K32-20BC, WEDPS512K32-17BM, WEDPS512K32-17BI Datasheet

White Electronic Designs		WEDPS512K32-XBX
512Kx32 SRAM MULTI-CHIP PACKAGE		ADVANCED*

FEATURES

Access Times of 12, 15, 17, 20, ns

Packaging

•16mm x 18mm, 143 PBGA

Organized as 512Kx32, User Configurable as 1Mx16 or 2Mx8

Commercial, Industrial and Military Temperature Ranges

TTL Compatible Inputs and Outputs

5 Volt Power Supply

Low Power CMOS

*This data sheet describles a product that is developmental, is not qualified and is subject to change or cancellation without notice.

FIG. 1 PIN CONFIGURATION FOR WEDPS512K32-XBX

TOP VIEW

1

2

3

4

5

6

7

8

9

1 0

1 1

1 2

A

-

A 2

A 1

A 0

GND

GND

V C C

V C C

A18

A17

A16

GND

B

CS2

A 3

A 4

D14

D15

NC

CS4

D24

D25

O E

A15

NC

C

D 9

D 8

NC

D12 D13

GND

V C C

D26

D27

WE4

D31

D30

D

D10

D11

GND

GND

GND

GND

V C C

V C C

V C C

VC C

D28

D29

E

GND

GND

GND

GND

GND

V C C

V C C

V C C

VC C

VC C

NC

WE2

F

GND

GND

GND

GND

GND

GND

V C C

V C C

V C C

VC C

VC C

V C C

G

V C C

VC C

V C C

VC C

V C C

VC C

GND

GND

GND

GND

GND

GND

H

VC C

V C C

VC C

V C C

VC C

GND

GND

GND

GND

GND

NC

CS1

J

D 1

D 0

V C C

VC C

V C C

VC C

GND

GND

GND

GND

D23

D22

K

D 2

D 3

NC

D 7

D 5

VC C

GND

D17

D16

D20

D21

CS3

L

WE1

A 6

A 5

D 6

D 4

NC

WE3

D19

D18

A14

A13

NC

M

GND

A 7

A 8

A 9

V C C

VC C

GND

GND

A10

A11

A12

V C C

BLOCK DIAGRAM

PIN DESCRIPTION

I/O0-31

DataInputs/Outputs

WE1 CS1

WE2 CS2

WE3 CS3

WE4 CS4

A0-18

Address Inputs

OE

A0-18

WE

1-4

Write Enables

512K x 8

512K x 8

512K x 8

512K x 8

CS1-4

Chip Selects

Output Enable

OE

8

8

8

8

VCC

Power Supply

I/O0-7

I/O8-15

I/O16-23

I/O24-31

GND

Ground

NC

Not Connected

August 2002 Rev. 4

1

White Electronic Designs Corporation • [phone] • www.whiteedc.com

White Electronic Designs

WEDPS512K32-XBX

ABSOLUTE MAXIMUM RATINGS

Parameter	Symbol	Min	Max	Unit
Operating Temperature	TA	-55	+125	°C
Storage Temperature	TSTG	-65	+150	°C
Signal Voltage Relative to GND	VG	-0.5	Vcc+0.5	V
Junction Temperature	TJ		150	°C
Supply Voltage	VCC	-0.5	7.0	V

TRUTH TABLE

CS

OE

WE

Mode

Data I/O

Power

H

X

X

Standby

High Z

Standby

L

L

H

Read

Data Out

Active

L

H

H

Out Disable

High Z

Active

L

X

L

Write

Data In

Active

RECOMMENDED OPERATING CONDITIONS

Parameter	Symbol	Min	Max	Unit
Supply Voltage	VCC	4.5	5.5	V
Input High Voltage	VIH	2.2	VCC + 0.3	V
Input Low Voltage	VIL	-0.5	+0.8	V
Operating Temp (Mil)	TA	-55	+125	°C

CAPACITANCE

(TA = +25°C)

	Parameter					Symbol	Conditions	Max	Unit
					capacitance	COE	VIN = 0 V, f = 1.0 MHz	30	pF
	OE
					1-4 capacitance	CWE	VIN = 0 V, f = 1.0 MHz	10	pF
	WE
			1-4 capacitance			CCS	VIN = 0 V, f = 1.0 MHz	10	pF
		CS
	Data I/O capacitance					CI/O	VI/O = 0 V, f = 1.0 MHz	10	pF
Address input capacitance						CAD	VIN = 0 V, f = 1.0 MHz	30	pF

This parameter is guaranteed by design but not tested.

DC CHARACTERISTICS

(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)

Parameter

Symbol

Conditions

Min

Max

Units

Input Leakage Current

ILI

VCC = 5.5, VIN = GND to VCC

10

µA

OutputLeakageCurrent

ILO

= VIH,

= VIH, VOUT = GND to VCC

10

µA

CS

OE

Operating Supply Current x 32 Mode

ICC x 32

= VIL,

= VIH, f = 5MHz, Vcc = 5.5

660

mA

CS

OE

StandbyCurrent

ISB

= VIH,

= VIH, f = 5MHz, Vcc = 5.5

80

mA

CS

OE

OutputLowVoltage

VOL

IOL = 8mA

0.4

V

Output High Voltage

VOH

IOH = -4.0mA

2.4

V

NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V

White Electronic Designs Corporation • Phoenix AZ • [phone]

2

White Electronic Designs								WEDPS512K32-XBX
		AC CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)
Parameter	Symbol	-12		-15			-17		-20			Units
Read Cycle		Min Max		Min Max			Min Max		Min		Max
Read Cycle Time	tRC	12		15			17		20			ns
Address Access Time	tA A		12		15			17			20	ns
Output Hold from Address Change	tOH	0		0			0		0			ns
Chip Select Access Time	tACS		12		15			17			20	ns
Output Enable to Output Valid	tOE		7		8			9			10	ns
Chip Select to Output in Low Z	tCLZ1	1		2			2		2			ns
Output Enable to Output in Low Z	tOLZ1	0		0			0		0			ns
Chip Disable to Output in High Z	tCHZ1		7		12			12			12	ns
Output Disable to Output in High Z	tOHZ1		7		12			12			12	ns

1. This parameter is guaranteed by design but not tested.

AC CHARACTERISTICS

(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)

Parameter	Symbol	-12		-15		-17		-20		Units
Read Cycle		Min Max		Min Max		Min Max		Min Max
Write Cycle Time	tWC	12		15		17		20		ns
Chip Select to End of Write	tCW	10		13		15		15		ns
Address Valid to End of Write	tA W	10		13		15		15		ns
Data Valid to End of Write	tDW	8		10		11		12		ns
Write Pulse Width	tWP	10		13		15		15		ns
Address Setup Time	tAS	0		2		2		2		ns
Address Hold Time	tAH	0		0		0		0		ns
Output Active from End of Write	tOW1	2		2		2		3		ns
Write Enable to Output in High Z	tWHZ1		7		8		9		11	ns
Data Hold Time	tD H	0		0		0		0

1. This parameter is guaranteed by design but not tested.

FIG. 4 AC TEST CIRCUIT			AC TEST CONDITIONS
			Parameter	Typ	Unit
			Input Pulse Levels	VIL = 0, VIH = 3.0	V
			Input Rise and Fall	5	ns
			Input and Output Reference Level	1.5	V
			Output Timing Reference Level	1.5	V

≈

Notes:

VZ is programmable from -2V to +7V.

IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 Ω .

VZ is typically the midpoint of VOH and VOL.

IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance.

3 White Electronic Designs Corporation • [phone] • www.whiteedc.com