MOTOROLA MC74LVXT8053DTR2, MC74LVXT8053DR2, MC74LVXT8053D, MC74LVXT8053DT Datasheet

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MC74LVXT8053

Analog Multiplexer / Demultiplexer

High–Performance Silicon–Gate CMOS

The MC74LVXT8053 utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. This analog multiplexer/demultiplexer controls analog voltages that may vary across the complete power supply range (from VCC to GND).

The LVXT8053 is similar in pinout to the high–speed HC4053A, and the metal–gate MC14053B. The Channel–Select inputs determine which one of the Analog Inputs/Outputs is to be connected by means of an analog switch to the Common Output/Input. When the Enable pin is HIGH, all analog switches are turned off.

The Channel–Select and Enable inputs are compatible with TTL–type input thresholds. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to 3.0V CMOS Logic while operating at the higher–voltage power supply .

The MC74LVXT8053 input structure provides protection when voltages up to 7V are applied, regardless of the supply voltage. This allows the MC74L VXT8053 to be used to interface 5V circuits to 3V circuits.

This device has been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal–gate CMOS analog switches.

• Fast Switching and Propagation Speeds

• Low Crosstalk Between Switches

• Diode Protection on All Inputs/Outputs

• Analog Power Supply Range (V

• Digital (Control) Power Supply Range (V

• Improved Linearity and Lower ON Resistance Than Metal–Gate

Counterparts

• Low Noise

• In Compliance With the Requirements of JEDEC Standard No. 7A

LOGIC DIAGRAM

Triple Single–Pole, Double–Position Plus Common Off

ANALOG

INPUTS/OUTPUTS

CHANNEL-SELECT

INPUTS

NOTE: This device allows independent control of each switch. Channel–Select Input A controls the X–Switch, Input B controls the Y–Switch and Input C controls the Z–Switch

Y0 Y1

Z0 Z1

ENABLE

5 3

– GND) = 2.0 to 6.0 V

X SWITCH

Y SWITCH

Z SWITCH

PIN 16 = V PIN 8 = GND

– GND) = 2.0 to 6.0 V

COMMON

OUTPUTS/INPUTS

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16–LEAD SOIC

D SUFFIX

CASE 751B

16–LEAD TSSOP

DT SUFFIX CASE 948F

PIN CONNECTION AND

MARKING DIAGRAM (Top View)

Y X X1 X0 A B C

1516 14 13 12 11 10

21 34567

Y1 Y0 Z1 Z Z0 Enable NC GND

For detailed package marking information, see the Marking Diagram section on page 1 1 of this data sheet.

FUNCTION TABLE – MC74LVXT8053

Control Inputs

Enable

L L L L L L L L

X = Don’t Care

Select

CBA

L H X

ON Channels

NONE

X0 X1 X0 X1 X0 X1 X0 X1

ORDERING INFORMATION

Device Package Shipping

MC74L VXT8053D SOIC 48 Units/Rail MC74L VXT8053DR2 SOIC MC74L VXT8053DT TSSOP 96 Units/Rail MC74L VXT8053DTR2 TSSOP

2500 Units/Reel

 Semiconductor Components Industries, LLC, 1999

March, 2000 – Rev . 2

1 Publication Order Number:

MC74LVXT8053/D

MC74LVXT8053

ÎÎ

ÎÎ ÎÎ

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MAXIMUM RATINGS*

Symbol

ÎÎ

Positive DC Supply Voltage (Referenced to GND)

Analog Input Voltage

Digital Input Voltage (Referenced to GND)

in I

DC Current, Into or Out of Any Pin

Power Dissipation in Still Air, SOIC Package†

ОООООООООООО

Storage Temperature Range

stg

Lead Temperature, 1 mm from Case for 10 Seconds

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C

TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

RECOMMENDED OPERATING CONDITIONS

Symbol

VIO*

tr, t

ÎÎ

*For voltage drops across switch greater than 1.2 V (switch on), excessive VCC current may

be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

Positive DC Supply Voltage (Referenced to GND)

Analog Input Voltage

Digital Input Voltage (Referenced to GND)

Static or Dynamic Voltage Across Switch Operating Temperature Range, All Package Types

Input Rise/Fall Time

(Channel Select or Enable Inputs)

ООООООООООООО

Parameter

TSSOP Package†

VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V

Value

– 0.5 to + 7.0 – 0.5 to VCC + 0.5 – 0.5 to VCC + 0.5

–20 500

450

ÎÎÎ

– 65 to + 150

260

Min

Max

2.0

6.0

0.0

GND

1.2

– 55

+ 85

100

Unit

ns/V

This device contains protection

V V V

circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V

should be constrained to the

out

range GND v (Vin or V

C C

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).

) v VCC.

out

Unused outputs must be left open.

V V V V

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MC74LVXT8053

ООООООООО

ÎÎÎÎ

DC CHARACTERISTICS — Digital Section (Voltages Referenced to GND)

Symbol Parameter Condition

DC ELECTRICAL CHARACTERISTICS Analog Section

Symbol

ÎÎ

ÎÎÎОООООООÎООООООО

∆R

ÎÎ

off

Minimum High–Level Input Voltage, Channel–Select or Enable Inputs

Maximum Low–Level Input

Voltage, Channel–Select or Enable Inputs

Maximum Input Leakage Current, Channel–Select or Enable Inputs

Maximum Quiescent Supply Current (per Package)

ООООООО

Parameter

Maximum “ON” Resistance

ООООООО

Maximum Difference in “ON” Resistance Between Any Two

ООООООО

Channels in the Same Package Maximum Off–Channel Leakage

Current, Any One Channel

Maximum Off–Channel Leakage Current, Common Channel

Maximum On–Channel Leakage Current, Channel–to–Channel

Ron = Per Spec 3.0

Vin = VCC or GND, 5.5 ± 0.1 ± 1.0 ± 1.0 µA

Channel Select, Enable and VIS = VCC or GND; VIO = 0 V

Test Conditions

ООООООО

Vin = VIL or V VIS = VCC to GND

ООООООО

|IS| v 10.0 mA (Figures 1, 2) Vin = VIL or V

VIS = VCC or GND (Endpoints)

|IS| v 10.0 mA (Figures 1, 2) Vin = VIL or V

VIS = 1/2 (VCC – GND)

ООООООО

|IS| v 10.0 mA Vin = VIL or VIH;

VIO = VCC or GND; Switch Off (Figure 3)

Vin = VIL or VIH; VIO = VCC or GND; Switch Off (Figure 4)

Vin = VIL or VIH; Switch–to–Switch = VCC or GND; (Figure 5)

4.5

5.5

4.5

5.5

Guaranteed Limit

–55 to 25°C ≤85°C ≤125°C

1.2

2.0

0.53

0.8

1.2

2.0

0.53

0.8

1.2

2.0

0.53

0.8

5.5 4 40 160 µA

Guaranteed Limit

ÎÎ

3.0

4.5

ÎÎ

5.5

3.0

4.5

ÎÎ

5.5

3.0

4.5

ÎÎ

5.5

– 55 to

25_C

ÎÎ

40 30

ÎÎ

25 30

ÎÎ

20 15

8.0

ÎÎ

8.0

85_C

45 32

28 35

25 20

125_C

ÎÎ

50 37

ÎÎ

30 40

ÎÎ

30 25

ÎÎ

5.5 0.1 0.5 1.0 µA

5.5 0.1 1.0 2.0

5.5 0.1 1.0 2.0 µA

Unit

Ω

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MC74LVXT8053

AC CHARACTERISTICS (C

Symbol Parameter

PLH

PHL

PLH

PHL

PLZ

PHZ

PZL

PZH

I/O

Maximum Propagation Delay , Channel–Select to Analog Output (Figure 9)

Maximum Propagation Delay , Analog Input to Analog Output (Figure 10)

Maximum Propagation Delay , Enable to Analog Output (Figure 11)

Maximum Input Capacitance, Channel–Select or Enable Inputs 10 10 10 pF

Maximum Capacitance Analog I/O 35 35 35 pF (All Switches Off) Common O/I 50 50 50

= 50 pF, Input tr = tf = 3 ns)

–55 to 25°C ≤85°C ≤125°C

2.0

3.0

4.5

5.5

2.0

3.0

4.5

5.5

2.0

3.0

4.5

5.5

2.0

3.0

4.5

5.5

Feedthrough 1.0 1.0 1.0

Guaranteed Limit

30 20 15 15

4.0

3.0

1.0

1.0 30

20 15 15

20 12

8.0

35 25 18 18

6.0

5.0

2.0

2.0 35

25 18 18

25 14 10 10

40 30 22 20

8.0

6.0

2.0

2.0 40

30 22 20

30 15 12 12

Unit

Power Dissipation Capacitance (Figure 13)*

*Used to determine the no–load dynamic power consumption: PD = CPD V

f + ICC VCC.

Typical @ 25°C, VCC = 5.0 V

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