MOTOROLA MC74VHC00TEL, MC74VHC00DTR2, MC74VHC00M, MC74VHC00MEL, MC74VHC00ML1 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Quad 2-Input NAND Gate

The MC74VHC00 is an advanced high speed CMOS 2±input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

•High Speed: tPD = 3.7ns (Typ) at VCC = 5V

•Low Power Dissipation: ICC = 2μA (Max) at TA = 25°C

•High Noise Immunity: VNIH = VNIL = 28% VCC

•Power Down Protection Provided on Inputs

•Balanced Propagation Delays

•Designed for 2V to 5.5V Operating Range

•Low Noise: VOLP = 0.8V (Max)

•Pin and Function Compatible with Other Standard Logic Families

•Latchup Performance Exceeds 300mA

•ESD Performance: HBM > 2000V; Machine Model > 200V

•Chip Complexity: 32 FETs or 8 Equivalent Gates

LOGIC DIAGRAM

A1	1	3	Y1
	2
B1
A2	4	6	Y2
	5
B2
	9		Y = AB
A3		8
			Y3
B3	10
A4	12	11
			Y4
B4	13

Pinout: 14±Lead Packages (Top View)

VCC			B4		A4		Y4		B3		A3		Y3
	14		13		12		11		10		9		8

MC74VHC00

D SUFFIX

14±LEAD SOIC PACKAGE

CASE 751A±03

DT SUFFIX

14±LEAD TSSOP PACKAGE

CASE 948G±01

M SUFFIX

14±LEAD SOIC EIAJ PACKAGE

CASE 965±01

ORDERING INFORMATION

MC74VHCXXD SOIC MC74VHCXXDT TSSOP MC74VHCXXM SOIC EIAJ

FUNCTION TABLE

	Inputs		Output
A		B		Y
L		L	H
L		H	H
H		L	H
H		H		L

	1		2		3				4		5		6				7
	A1		B1			Y1			A2		B2			Y2		GND

6/97

Motorola, Inc. 1997

1

REV 1

MC74VHC00

MAXIMUM RATINGS*

Symbol	Parameter		Value	Unit
VCC	DC Supply Voltage		± 0.5 to + 7.0	V
Vin	DC Input Voltage		± 0.5 to + 7.0	V
Vout	DC Output Voltage		± 0.5 to VCC + 0.5	V
IIK	Input Diode Current		± 20	mA
IOK	Output Diode Current		± 20	mA
Iout	DC Output Current, per Pin		± 25	mA
ICC	DC Supply Current, VCC and GND Pins		± 50	mA
PD	Power Dissipation in Still Air,	SOIC Packages²	500	mW
		TSSOP Package²	450
Tstg	Storage Temperature		± 65 to + 150	_C

*Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute±maximum±rated conditions is not implied.

²Derating Ð SOIC Packages: ± 7 mW/ _C from 65_ to 125_C TSSOP Package: ± 6.1 mW/_C from 65_ to 125_C

RECOMMENDED OPERATING CONDITIONS

Symbol	Parameter		Min	Max	Unit
VCC	DC Supply Voltage		2.0	5.5	V
Vin	DC Input Voltage		0	5.5	V
Vout	DC Output Voltage		0	VCC	V
TA	Operating Temperature, All Package Types		± 40	+ 85	_C
tr, tf	Input Rise and Fall Time	VCC = 3.3V ±0.3V	0	100	ns/V
		VCC =5.0V ±0.5V	0	20

DC ELECTRICAL CHARACTERISTICS

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

			VCC		TA = 25°C		TA = ± 40 to 85°C
Symbol	Parameter	Test Conditions	V	Min	Typ	Max	Min	Max	Unit
VIH	High±Level Input		2.0	1.50			1.50		V
	Voltage		3.0 to	VCC x 0.7			VCC x 0.7
			5.5
VIL	Low±Level Input		2.0			0.50		0.50	V
	Voltage		3.0 to			VCC x 0.3		VCC x 0.3
			5.5
VOH	High±Level Output	Vin = VIH or VIL	2.0	1.9	2.0		1.9		V
	Voltage	IOH = ± 50μA	3.0	2.9	3.0		2.9
			4.5	4.4	4.5		4.4
		Vin = VIH or VIL
		IOH = ± 4mA	3.0	2.58			2.48
		IOH = ± 8mA	4.5	3.94			3.80
VOL	Low±Level Output	Vin = VIH or VIL	2.0		0.0	0.1		0.1	V
	Voltage	IOL = 50μA	3.0		0.0	0.1		0.1
			4.5		0.0	0.1		0.1
		Vin = VIH or VIL
		IOL = 4mA	3.0			0.36		0.44
		IOL = 8mA	4.5			0.36		0.44

MOTOROLA	2	VHC Data ± Advanced CMOS Logic
		DL203 Ð Rev 1