MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Hex D Master-Slave Flip-Flop
The MC10H176 contains six master slave type D flip±flops with a common clock. This MECL 10H part is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in clock frequency and propagation delay and no increase in power±supply current.
•Propagation Delay, 1.7 ns Typical
•Power Dissipation, 460 mW Typical
•Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range)
•Voltage Compensated
•MECL 10K±Compatible
MAXIMUM RATINGS
Characteristic |
Symbol |
Rating |
Unit |
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Power Supply (VCC = 0) |
VEE |
±8.0 to 0 |
Vdc |
Input Voltage (VCC = 0) |
VI |
0 to VEE |
Vdc |
Output Current Ð Continuous |
Iout |
50 |
mA |
Ð Surge |
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100 |
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Operating Temperature Range |
TA |
0 to +75 |
°C |
Storage Temperature Range Ð Plastic |
Tstg |
±55 to +150 |
°C |
Ð Ceramic |
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±55 to +165 |
°C |
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ELECTRICAL CHARACTERISTICS (VEE = ±5.2 V ±5%) (See Note)
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0° |
25° |
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75° |
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Characteristic |
Symbol |
Min |
Max |
Min |
Max |
Min |
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Max |
Unit |
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Power Supply Current |
IE |
Ð |
123 |
Ð |
112 |
Ð |
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123 |
mA |
Input Current High |
IinH |
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μA |
Pins 5,6,7,10,11,12 |
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Ð |
425 |
Ð |
265 |
Ð |
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265 |
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Pin 9 |
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Ð |
670 |
Ð |
420 |
Ð |
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420 |
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Input Current Low |
IinL |
0.5 |
Ð |
0.5 |
Ð |
0.3 |
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Ð |
μA |
High Output Voltage |
VOH |
±1.02 |
±0.84 |
±0.98 |
±0.81 |
±0.92 |
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±0.735 |
Vdc |
Low Output Voltage |
VOL |
±1.95 |
±1.63 |
±1.95 |
±1.63 |
±1.95 |
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±1.60 |
Vdc |
High Input Voltage |
VIH |
±1.17 |
±0.84 |
±1.13 |
±0.81 |
±1.07 |
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±0.735 |
Vdc |
Low Input Voltage |
VIL |
±1.95 |
±1.48 |
±1.95 |
±1.48 |
±1.95 |
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±1.45 |
Vdc |
AC PARAMETERS |
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Propagation Delay |
tpd |
0.9 |
2.1 |
0.9 |
2.2 |
1.0 |
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2.4 |
ns |
Set±up Time |
tset |
1.5 |
Ð |
1.5 |
Ð |
1.5 |
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Ð |
ns |
Hold Time |
thold |
0.9 |
Ð |
0.9 |
Ð |
1.0 |
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Ð |
ns |
Rise Time |
tr |
0.5 |
1.8 |
0.5 |
1.9 |
0.5 |
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2.0 |
ns |
Fall Time |
tf |
0.5 |
1.8 |
0.5 |
1.9 |
0.5 |
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2.0 |
ns |
Toggle Frequency |
ftog |
250 |
Ð |
250 |
Ð |
250 |
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Ð |
MHz |
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50±ohm resistor to ±2.0 volts.
MC10H176
L SUFFIX
CERAMIC PACKAGE
CASE 620±10
P SUFFIX
PLASTIC PACKAGE
CASE 648±08
FN SUFFIX
PLCC
CASE 775±02
CLOCKED TRUTH TABLE
C |
Q |
Qn+1 |
L |
X |
Qn |
H * |
L |
L |
H * |
H |
H |
*A clock H is a clock transition from a low to a high state.
DIP
PIN ASSIGNMENT
VCC1 |
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1 |
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16 |
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VCC2 |
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Q0 |
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2 |
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15 |
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Q5 |
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Q1 |
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3 |
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14 |
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Q4 |
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Q2 |
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4 |
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13 |
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Q3 |
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D0 |
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5 |
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12 |
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D5 |
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D1 |
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6 |
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11 |
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D4 |
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D2 |
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7 |
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10 |
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D3 |
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VEE |
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8 |
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9 |
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CLOCK |
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Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±11 of the Motorola MECL Data Book (DL122/D).
3/93
Motorola, Inc. 1996 |
2±113 |
REV 5 |
MC10H176
APPLICATION INFORMATION
The MC10H176 contains six high±speed, master slave type ªDº flip±flops. Data is entered into the master when the clock is low. Master±to±slave data transfer takes place on the positive±going Clock transition. Thus,
outputs may change only on a positive±going Clock transition. A change in the information present at the data
(D) input will not affect the output information any other time due to the master±slave construction of this device.
LOGIC DIAGRAM
D0 |
5 |
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2 |
Q0 |
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D1 |
6 |
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3 |
Q1 |
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D2 |
7 |
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4 |
Q2 |
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D3 |
10 |
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13 |
Q3 |
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D4 |
11 |
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14 |
Q4 |
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D5 |
12 |
15 |
Q5 |
CLOCK |
9 |
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VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
MOTOROLA |
2±114 |
MECL Data |
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DL122 Ð Rev 6 |