MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input Multiplexer/
Latch
The MC10H173 is a quad 2±input multiplexer with latch. This device is a functional/pinout duplication of the standard MECL 10K part, with 100% improvement in propagation delay and no increase in power supply current.
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Data Propagation Delay, 1.5 ns Typical |
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Voltage Compensated |
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Power Dissipation, 275 mW Typical |
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MECL 10K±Compatible |
•Improved Noise Margin 150 mV (over operating voltage and temperature range)
MAXIMUM RATINGS
Characteristic |
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Symbol |
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Rating |
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Unit |
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Power Supply (VCC = 0) |
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VEE |
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±8.0 to 0 |
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Vdc |
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Input Voltage (VCC = 0) |
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VI |
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0 to VEE |
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Vdc |
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Output Current Ð Continuous |
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Iout |
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50 |
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mA |
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Ð Surge |
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100 |
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Operating Temperature Range |
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TA |
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0 to +75 |
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°C |
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Storage Temperature Range Ð Plastic |
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Tstg |
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±55 to +150 |
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°C |
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Ð Ceramic |
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±55 to +165 |
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°C |
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ELECTRICAL CHARACTERISTICS (VEE = ±5.2 V ±5%) (See Note) |
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0° |
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25° |
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75° |
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Characteristic |
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Symbol |
Min |
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Max |
Min |
Max |
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Min |
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Max |
Unit |
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Power Supply Current |
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IE |
Ð |
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73 |
Ð |
66 |
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Ð |
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73 |
mA |
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Input Current High |
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IinH |
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μA |
Pins 3±7 & 10±13 |
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Ð |
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510 |
Ð |
320 |
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Ð |
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320 |
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Pin 9 |
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Ð |
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475 |
Ð |
300 |
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Ð |
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300 |
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Input Current Low |
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IinL |
0.5 |
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Ð |
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0.5 |
Ð |
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0.3 |
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Ð |
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μA |
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High Output Voltage |
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VOH |
±1.02 |
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±0.84 |
±0.98 |
±0.81 |
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±0.92 |
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±0.735 |
Vdc |
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Low Output Voltage |
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VOL |
±1.95 |
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±1.63 |
±1.95 |
±1.63 |
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±1.95 |
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±1.60 |
Vdc |
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High Input Voltage |
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VIH |
±1.17 |
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±0.84 |
±1.13 |
±0.81 |
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±1.07 |
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±0.735 |
Vdc |
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Low Input Voltage |
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VIL |
±1.95 |
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±1.48 |
±1.95 |
±1.48 |
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±1.95 |
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±1.45 |
Vdc |
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AC PARAMETERS |
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Propagation Delay |
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tpd |
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ns |
Data |
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0.7 |
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2.3 |
0.7 |
2.3 |
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0.7 |
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2.3 |
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Clock |
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1.0 |
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3.7 |
1.0 |
3.7 |
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1.0 |
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3.7 |
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Select |
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1.0 |
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3.6 |
1.0 |
3.6 |
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1.0 |
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3.6 |
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Set±up Time |
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tset |
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ns |
Data |
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0.7 |
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Ð |
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0.7 |
Ð |
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0.7 |
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Ð |
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Select |
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1.0 |
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Ð |
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1.0 |
Ð |
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1.0 |
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Ð |
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Hold Time |
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thold |
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ns |
Data |
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0.7 |
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Ð |
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0.7 |
Ð |
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0.7 |
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Ð |
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Select |
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1.0 |
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Ð |
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1.0 |
Ð |
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1.0 |
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Ð |
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Rise Time |
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tr |
0.7 |
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2.4 |
0.7 |
2.4 |
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0.7 |
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2.4 |
ns |
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Fall Time |
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tf |
0.7 |
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2.4 |
0.7 |
2.4 |
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0.7 |
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2.4 |
ns |
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NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through a 50±ohm resistor to ±2.0 volts.
MC10H173
L SUFFIX
CERAMIC PACKAGE
CASE 620±10
P SUFFIX
PLASTIC PACKAGE
CASE 648±08
FN SUFFIX
PLCC
CASE 775±02
TRUTH TABLE
SELECT |
CLOCK |
Q0n + 1 |
H |
L |
D00 |
L |
L |
D01 |
X |
H |
Q0n |
DIP
PIN ASSIGNMENT
Q0 |
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1 |
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16 |
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VCC |
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Q1 |
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2 |
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15 |
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Q2 |
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D11 |
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3 |
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14 |
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Q3 |
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D10 |
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4 |
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13 |
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D20 |
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D01 |
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5 |
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12 |
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D21 |
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D00 |
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6 |
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11 |
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D30 |
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CLOCK |
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7 |
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10 |
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D31 |
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VEE |
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8 |
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9 |
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SELECT |
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Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±11 of the Motorola MECL Data Book (DL122/D).
3/93
Motorola, Inc. 1996 |
2±53 |
REV 5 |
MC10H173
APPLICATION INFORMATION
The MC10173 is a quad two±channel multiplexer with latch. It incorporates common clock and common data select inputs. The select input determines which data input is enabled. A high (H) level enables data inputs D00, D10, D20, and D30 and a low (L) level enables data inputs D01, D11, D21, D31. Any change on the data input
will be reflected at the outputs while the clock is low. The outputs are latched on the positive transition of the clock. While the clock is in the high state, a change in the information present at the data inputs will not affect the output information.
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LOGIC DIAGRAM |
SELECT 9 |
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1 Q0 |
D00 |
6 |
D01 |
5 |
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2 Q1 |
D10 |
4 |
D11 |
3 |
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15 Q2 |
D20 13 |
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D21 12 |
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14 Q3 |
D30 11 |
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D31 10 |
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CLOCK 7 |
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VCC = PIN 16 |
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VEE = PIN 8 |
MOTOROLA |
2±54 |
MECL Data |
DL122 Ð Rev 6
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