October 1987
Revised August 2000
CD4023BC
Buffered Triple 3-Input NAND Gate
General Description
These triple gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P- channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outputs which improve transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS.
Features
■Wide supply voltage range: 3.0V to 15V
■High noise immunity: 0.45 VDD (typ)
■Low power TTL compatibility:
fan out of 2 driving 74L or 1 driving 74LS
■5V–10V–15V parametric ratings
■Symmetrical output characteristics
■Maximum input leakage 1 A at 15V over full temperature range
Ordering Code:
Order Number |
Package Number |
Package Description |
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CD4023BCM |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow |
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CD4023BCS |
M14D |
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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CD4023BCN |
N14A |
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” tot he ordering code.
Connection Diagram |
Block Diagram |
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1/3 Device Shown |
Top View |
*All Inputs Protected by Standard CMOS Input Protection Circuit. |
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Gate NAND Input-3 Triple Buffered CD4023BC
© 2000 Fairchild Semiconductor Corporation |
DS005956 |
www.fairchildsemi.com |
CD4023BC
Absolute Maximum Ratings(Note 1)
(Note 2) |
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DC Supply Voltage (VDD) |
− 0.5 VDC to + 18 |
VDC |
Input Voltage (VIN) |
− 0.5 VDC to VDD+ 0.5 |
VDC |
Storage Temp. Range (TS) |
− 65° C to + 150° C |
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Power Dissipation (PD) |
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Dual-In-Line |
700 mW |
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Small Outline |
500 mW |
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Lead Temperature (TL) |
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(Soldering, 10 seconds) |
260° C |
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Recommended Operating
Conditions
DC Supply Voltage (VDD) |
5 VDC to 15 VDC |
Input Voltage (VIN) |
0 VDC to VDD VDC |
Operating Temperature Range (TA) |
− 40° C to + 85° C |
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation.
Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics (Note 3)
Symbol |
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Parameter |
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Conditions |
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− 40° C |
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+ 25° C |
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+ 85° C |
Units |
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Min |
Typ |
Min |
Typ |
Max |
Min |
Max |
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IDD |
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Quiescent Device Current |
VDD = |
5V |
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1.0 |
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0.004 |
1.0 |
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7.5 |
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VDD = |
10V |
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2.0 |
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0.005 |
2.0 |
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15 |
µ A |
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VDD = |
15V |
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4.0 |
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0.006 |
4.0 |
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30 |
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VOL |
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LOW Level Output Voltage |
VDD = |
5V |
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0.05 |
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0 |
0.05 |
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0.05 |
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VDD = |
10V |
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0.05 |
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0 |
0.05 |
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0.05 |
V |
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VDD = |
15V |
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0.05 |
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0 |
0.05 |
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0.05 |
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VOH |
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HIGH Level Output Voltage |
VDD = |
5V |
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4.95 |
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4.95 |
5 |
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4.95 |
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VDD = |
10V |
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9.95 |
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9.95 |
10 |
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9.95 |
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V |
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VDD = |
15V |
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14.95 |
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14.95 |
15 |
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14.95 |
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VIL |
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LOW Level Input Voltage |
VDD= |
5V, VO= 4.5V |
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1.5 |
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2 |
1.5 |
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1.5 |
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VDD= |
10V, VO= 9.0V |
|IO|< 1µ A |
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3.0 |
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4 |
3.0 |
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3.0 |
V |
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VDD= |
15V, VO= 13.5V |
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4.0 |
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6 |
4.0 |
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4.0 |
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VIH |
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HIGH Level Input Voltage |
VDD= |
5V, VO= 0.5V |
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3.5 |
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3.5 |
3 |
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3.5 |
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VDD= |
10V, VO= 1.0V |
|IO|< 1µ A |
7.0 |
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7.0 |
6 |
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7.0 |
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V |
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VDD= |
15V, VO= 1.5V |
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11.0 |
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11.0 |
9 |
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11.0 |
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IOL |
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LOW Level Output Current |
VDD= |
5V, VO = 0.4V |
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0.52 |
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0.44 |
0.88 |
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0.36 |
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(Note 4) |
VDD = |
10V, VO = |
0.5V |
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1.3 |
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1.1 |
2.2 |
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0.90 |
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mA |
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VDD = |
15V, VO = |
1.5V |
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3.6 |
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3.0 |
8 |
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2.4 |
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IOH |
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HIGH Level Output Current |
VDD = |
5V, VO = 4.6V |
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− 0.52 |
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− 0.44 |
− 0.88 |
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− 0.36 |
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(Note 4) |
VDD = |
10V, VO = |
9.5V |
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− 1.3 |
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− 1.1 |
− 2.2 |
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− 0.90 |
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mA |
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VDD = |
15V, VO = |
13.5V |
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− 3.6 |
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− 3.0 |
− 8 |
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− 2.4 |
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IIN |
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Input Current |
VDD = |
15V, VIN = |
0V |
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− 0.3 |
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− 10− 5 |
− 0.3 |
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− 1.0 |
µ A |
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VDD = |
15V, VIN = |
15V |
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0.3 |
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10− 5 |
0.3 |
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1.0 |
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Note 3: VSS = |
0V unless otherwise specified. |
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Note 4: IOH and IOL are tested one output at a time.
www.fairchildsemi.com |
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