Fairchild Semiconductor CD4512BCN, CD4512BCMX, CD4512BCM, CD4512BCCW Datasheet

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October 1987

Revised January 1999

CD4512BC

8-Channel Buffered Data Selector

General Description

The CD4512BC buffered 8-channel data selector is a complementary MOS (CMOS) circuit constructed with N- and P-channel enhancement mode transistors. This data selector is primarily used as a digital signal multiplexer selecting 1 of 8 inputs and routing the signal to a 3-STATE output. A high level at the Inhibit input forces a low level at the out-

put. A high level at the Output Enable (OE) input forces the output into the 3-STATE condition. Low levels at both the Inhibit and (OE) inputs allow normal operation.

Features

Wide supply voltage range: 3.0V to 15V

High noise immunity: 0.45 VDD (typ.)

3-STATE output

Low quiescent power dissipation:

0.25μW/package (typ.) @ VCC = 5.0V

Plug-in replacement for Motorola MC14512

Ordering Code:

Order Number

Package Number

Package Description

 

 

 

CD4512BCM

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body

 

 

 

CD4512BCN

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

 

 

 

Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.

Connection Diagram

Truth Table

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin Assignments for SOIC and DIP

 

Address Inputs

Control Inputs

Output

 

 

 

 

 

 

 

 

 

 

 

 

C

B

A

Inhibit

 

 

 

Z

 

OE

 

 

 

 

 

 

 

 

 

 

 

 

0

0

0

0

 

0

 

X0

 

 

0

0

1

0

 

0

 

X1

 

 

0

1

0

0

 

0

 

X2

 

 

0

1

1

0

 

0

 

X3

 

 

1

0

0

0

 

0

 

X4

 

 

1

0

1

0

 

0

 

X5

 

 

1

1

0

0

 

0

 

X6

 

 

1

1

1

0

 

0

 

X7

Top View

 

2

1

1

1

 

0

 

0

 

 

 

 

 

 

 

 

 

 

 

2

2

2

2

 

1

 

Hi-Z

 

 

 

 

 

 

 

 

 

 

2 = Don't care

Hi-Z = 3-STATE condition Xn = Data at input n

Selector Data Buffered Channel-8 CD4512BC

© 1999 Fairchild Semiconductor Corporation

DS005993.prf

www.fairchildsemi.com

Fairchild Semiconductor CD4512BCN, CD4512BCMX, CD4512BCM, CD4512BCCW Datasheet

CD4512BC

Logic Diagram

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2

Absolute Maximum Ratings(Note 1)

(Note 2)

 

 

Supply Voltage (VDD)

0.5 to +18

VDC

Input Voltage (VIN)

0.5 to VDD + 0.5

VDC

Storage Temperature Range (TS)

65°C to +150°C

Power Dissipation (P D)

 

 

Dual-In-Line

700 mW

Small Outline

500 mW

Lead Temperature, (TL)

260°C

(Soldering, 10 seconds)

DC Electrical Characteristics (Note 2)

Recommended Operating

Conditions (Note 2)

DC Supply Voltage (V DD)

3.0 to 15 VDC

Input Voltage (VIN)

0 to VDD VDC

Operating Temperature Range (TA)

40°C to +85°C

Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The Recommended Operating Conditions and Electrical Characteristics table provide conditions for actual device operation.

Note 2: VSS = 0V unless otherwise specified.

Symbol

Parameter

 

 

Conditions

40°C

 

+25°C

 

+85°C

Units

 

 

 

 

 

 

 

Min

Max

Min

Typ

Max

Min

Max

 

 

 

 

 

 

 

 

 

 

 

 

IDD

Quiescent Device

VDD = 5V, VIN = VDD or VSS

 

20

 

0.005

20

 

150

μA

 

Current

VDD = 10V, VIN = VDD or VSS

 

40

 

0.010

40

 

300

μA

 

 

VDD = 15V, VIN = VDD or VSS

 

80

 

0.015

80

 

600

μA

VOL

LOW Level

VDD = 5V

 

 

 

0.05

 

0

0.05

 

0.05

V

 

Output Voltage

VDD = 10V

 

|IOL| < 1 μA

 

0.05

 

0

0.05

 

0.05

V

 

 

VDD = 15V

 

 

 

0.05

 

0

0.05

 

0.05

V

VOH

HIGH Level

VDD = 5V

 

 

4.95

 

4.95

5.0

 

4.95

 

V

 

Output Voltage

VDD = 10V

 

|I OH| < 1 μA

9.95

 

9.95

10.0

 

9.95

 

V

 

 

VDD = 15V

 

 

14.95

 

14.95

15.0

 

14.95

 

V

VIL

LOW Level

VDD = 5V, VO = 0.5V

 

1.5

 

2.25

1.5

 

1.5

V

 

Input Voltage

VDD = 10V, VO = 1.0V

 

3.0

 

4.50

3.0

 

3.0

V

 

 

VDD = 15V, VO = 1.5V

 

4.0

 

6.75

4.0

 

4.0

V

VIH

HIGH Level

VDD = 5V, VO = 4.5V

3.5

 

3.5

2.75

 

3.5

 

V

 

Input Voltage

VDD = 10V, VO = 9.0V

7.0

 

7.0

5.50

 

7.0

 

V

 

 

VDD = 15V, VO = 13.5V

11.0

 

11.0

8.25

 

11.0

 

V

IOL

LOW Level Output

VDD = 5V, VO = 0.4V

0.52

 

0.44

0.78

 

0.36

 

mA

 

Current

VDD = 10V, VO = 0.5V

1.3

 

1.1

2.0

 

0.9

 

mA

 

(Note 3)

VDD = 15V, VO = 1.5V

3.6

 

3.4

7.8

 

2.4

 

mA

IOH

HIGH Level Output

VDD = 5V, VO = 4.6V

0.2

 

0.16

 

 

0.12

 

mA

 

Current

VDD = 10V, VO = 9.5

0.5

 

0.4

 

 

0.3

 

mA

 

(Note 3)

VDD = 15V, V O = 13.5V

1.4

 

1.2

105

 

1.0

 

mA

I

Input Current

V

DD

= 15V, V

IN

= 0V

 

0.3

 

0.3

 

1.0

μA

IN

 

 

= 15V, V

= 15V

 

 

 

105

 

 

 

μA

 

 

V

DD

IN

 

0.3

 

0.3

 

1.0

 

 

 

= 15V, V

= 0V

 

±1.0

 

±10 5

±1.0

 

±7.5

μA

I

3-STATE

V

DD

O

 

 

 

OZ

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Current

VDD = 15V, VO = 15V

 

 

 

 

 

 

 

 

Note 3: IOH and IOL are tested one output at a time.

CD4512BC

3

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