October 1987
Revised January 1999
CD4030C
Quad EXCLUSIVE-OR Gate
General Description
The CD4030C EXCLUSIVE-OR gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. All inputs are protected against static discharge with diodes to VDD and VSS.
Features
■Wide supply voltage range: 3.0V to 15V
■Low power: 100 nW (typ.)
■Medium speed operation:
tPHL = tPLH = 40 ns (typ.) at CL = 15 pF, 10V supply
■ High noise immunity 0.45 VCC (typ.)
Applications
•Automotive
•Data terminals
•Instrumentation
•Medical electronics
•Industrial controls
•Remote metering
•Computers
Ordering Code:
Order Number |
Package Number |
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Package Description |
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CD4030CSJ |
M14D |
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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CD4030CN |
N14A |
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. |
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Connection Diagram |
Truth Table |
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Pin Assignments for DIP and SOP |
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A |
B |
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J |
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0 |
0 |
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0 |
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1 |
0 |
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1 |
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0 |
1 |
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1 |
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1 |
1 |
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0 |
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1 = HIGH Level
0 = LOW Level
Gate OR-EXCLUSIVE Quad CD4030C
© 1999 Fairchild Semiconductor Corporation |
DS005961.prf |
www.fairchildsemi.com |
CD4030C
Logic Diagram
www.fairchildsemi.com |
2 |
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