Fairchild Semiconductor 74ACT138SJX, 74ACT138SJ, 74ACT138SCX, 74ACT138SC, 74ACT138PC Datasheet

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November 1988

Revised August 2000

74AC138 • 74ACT138

1-of-8 Decoder/Demultiplexer

General Description

The AC/ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three AC/ACT138 devices or a 1-of-32 decoder using four AC/ACT138 devices and one inverter.

Features

ICC reduced by 50%

Demultiplexing capability

Multiple input enable for easy expansion

Active LOW mutually exclusive outputs

Outputs source/sink 24 mA

ACT138 has TTL-compatible inputs

Ordering Code:

Order Number

Package Number

Package Description

 

 

 

74AC138SC

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

 

 

 

74AC138SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

 

 

 

74AC138MTC

MTC16

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

 

 

 

74AC138PC

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

 

 

 

74ACT138SC

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

 

 

 

74ACT138SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

 

 

 

74ACT138PC

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

 

 

 

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Logic Symbols

IEEE/IEC

Pin Descriptions

 

 

Pin Names

Description

 

 

 

 

A0–A2

Address Inputs

 

 

 

 

 

 

 

 

 

E

1–E

2

Enable Inputs

 

E3

Enable Input

 

 

 

 

7

Outputs

 

O

0–O

FACT is a trademark of Fairchild Semiconductor Corporation.

Decoder/Demultiplexer 8-of-1 74ACT138 • 74AC138

© 2000 Fairchild Semiconductor Corporation

DS009925

www.fairchildsemi.com

Fairchild Semiconductor 74ACT138SJX, 74ACT138SJ, 74ACT138SCX, 74ACT138SC, 74ACT138PC Datasheet

74AC138 • 74ACT138

Truth Table

 

 

 

 

 

 

 

Inputs

 

 

 

 

 

 

 

 

 

 

 

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E1

E2

E3

A0

 

A1

A2

O0

O1

O2

O3

O4

O5

O6

O7

 

 

H

 

X

X

X

 

X

X

 

H

 

H

 

H

 

H

 

H

 

H

 

H

 

H

 

 

X

 

H

X

X

 

X

X

 

H

 

H

 

H

 

H

 

H

 

H

 

H

 

H

 

 

X

 

X

L

X

 

X

X

 

H

 

H

 

H

 

H

 

H

 

H

 

H

 

H

 

 

L

 

L

H

L

 

L

L

 

L

 

H

 

H

 

H

 

H

 

H

 

H

 

H

 

 

L

 

L

H

H

 

L

L

 

H

 

L

 

H

 

H

 

H

 

H

 

H

 

H

 

 

L

 

L

H

L

 

H

L

 

H

 

H

 

L

 

H

 

H

 

H

 

H

 

H

 

 

L

 

L

H

H

 

H

L

 

H

 

H

 

H

 

L

 

H

 

H

 

H

 

H

 

 

L

 

L

H

L

 

L

H

 

H

 

H

 

H

 

H

 

L

 

H

 

H

 

H

 

 

L

 

L

H

H

 

L

H

 

H

 

H

 

H

 

H

 

H

 

L

 

H

 

H

 

 

L

 

L

H

L

 

H

H

 

H

 

H

 

H

 

H

 

H

 

H

 

L

 

H

 

 

L

 

L

H

H

 

H

H

 

H

 

H

 

H

 

H

 

H

 

H

 

H

 

L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H = HIGH Voltage Level

 

 

L = LOW Voltage Level

 

X = Immaterial

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Functional Description

 

 

 

 

 

Logic Diagram

 

 

 

 

 

 

 

 

 

The AC/ACT138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive activeLOW outputs (O0–O7). The AC/ACT138 features three

Enable inputs, two active-LOW (E1, E2) and one active-

HIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four AC/ACT138 devices and one inverter (see Figure 1). The AC/ACT138 can be used as an 8-output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active-HIGH or active-LOW state.

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

FIGURE 1. Expansion to 1-of-32 Decoding

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2

Absolute Maximum Ratings(Note 1)

Supply Voltage (VCC)

− 0.5V to + 7.0V

DC Input Diode Current (IIK)

 

VI =

− 0.5V

− 20 mA

VI =

VCC + 0.5V

+ 20 mA

DC Input Voltage (VI)

− 0.5V to VCC + 0.5V

DC Output Diode Current (IOK)

 

VO =

− 0.5V

− 20 mA

VO =

VCC + 0.5V

+ 20 mA

DC Output Voltage (VO)

− 0.5V to VCC + 0.5V

DC Output Source

 

or Sink Current (IO)

± 50 mA

DC VCC or Ground Current

 

per Output Pin (ICC or IGND)

± 50 mA

Storage Temperature (TSTG)

− 65° C to + 150° C

Junction Temperature (TJ)

 

PDIP

140° C

Recommended Operating

Conditions

Supply Voltage (VCC)

 

AC

2.0V to 6.0V

ACT

4.5V to 5.5V

Input Voltage (VI)

0V to VCC

Output Voltage (VO)

0V to VCC

Operating Temperature (TA)

− 40° C to + 85° C

Minimum Input Edge Rate (∆ V/∆ t)

 

AC Devices

 

VIN from 30% to 70% of VCC

 

VCC @ 3.3V, 4.5V, 5.5V

125 mV/ns

Minimum Input Edge Rate (∆ V/∆ t)

 

ACT Devices

 

VIN from 0.8V to 2.0V

 

VCC @ 4.5V, 5.5V

125 mV/ns

Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.

DC Electrical Characteristics for AC

Symbol

Parameter

VCC

TA = + 25° C

 

TA = − 40° C to + 85° C

Units

 

 

Conditions

 

 

(V)

Typ

 

Guaranteed Limits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

Minimum HIGH Level

3.0

1.5

2.1

 

2.1

 

VOUT =

0.1V

 

Input Voltage

4.5

2.25

3.15

 

3.15

V

or VCC

0.1V

 

 

5.5

2.75

3.85

 

3.85

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

Maximum LOW Level

3.0

1.5

0.9

 

0.9

 

VOUT =

0.1V

 

Input Voltage

4.5

2.25

1.35

 

1.35

V

or VCC

0.1V

 

 

5.5

2.75

1.65

 

1.65

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH

Minimum HIGH Level

3.0

2.99

2.9

 

2.9

 

 

 

 

 

 

Output Voltage

4.5

4.49

4.4

 

4.4

V

IOUT =

50 µ A

 

 

5.5

5.49

5.4

 

5.4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN =

VIL or VIH

 

 

3.0

 

2.56

 

2.46

 

IOH =

12 mA

 

 

4.5

 

3.86

 

3.76

V

IOH =

24 mA

 

 

5.5

 

4.86

 

4.76

 

IOH =

− 24 mA (Note 2)

VOL

Maximum LOW Level

3.0

0.002

0.1

 

0.1

 

 

 

 

 

 

Output Voltage

4.5

0.001

0.1

 

0.1

V

IOUT =

50 µ A

 

 

5.5

0.001

0.1

 

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN =

VIL or VIH

 

 

3.0

 

0.36

 

0.44

 

IOL =

24 mA

 

 

4.5

 

0.36

 

0.44

V

IOL =

24 mA 0

 

 

5.5

 

0.36

 

0.44

 

IOL =

24 mA (Note 2)

IIN

Maximum Input

5.5

 

± 0.1

 

± 1.0

µ A

VI =

VCC, GND

(Note 4)

Leakage Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOLD

Minimum Dynamic

5.5

 

 

 

75

mA

VOLD =

1.65V Max

IOHD

Output Current (Note 3)

5.5

 

 

 

− 75

mA

VOHD =

 

3.85V Min

ICC

Maximum Quiescent

5.5

 

4.0

 

40.0

µ A

VIN =

VCC or GND

(Note 4)

Supply Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note 2: All outputs loaded; thresholds on input associated with output under test.

Note 3: Maximum test duration 2.0 ms, one output loaded at a time.

Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.

74ACT138 • 74AC138

3

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