Fairchild Semiconductor HUF75329G3, HUF75329P3, HUF75329S3S Datasheet

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HUF75329G3, HUF75329P3, HUF75329S3S

 

Data Sheet

December 2001

 

 

 

 

 

 

49A, 55V, 0.024 Ohm, N-Channel UltraFET

Power MOSFETs

These N-Channel power MOSFETs are manufactured using the innovative UltraFET® process. This advanced process technology

achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, lowvoltage bus switches, and power management in portable and battery-operated products.

Formerly developmental type TA75329.

Ordering Information

PART NUMBER

PACKAGE

BRAND

 

 

 

HUF75329G3

TO-247

75329G

 

 

 

HUF75329P3

TO-220AB

75329P

 

 

 

HUF75329S3S

TO-263AB

75329S

 

 

 

NOTE: When ordering, use the entire part number. Add the suffix T to obtain the TO-263AB variant in tape and reel, e.g., HUF75329S3ST.

Features

49A, 55V

Ultra Low On-Resistance, rDS(ON) = 0.024Ω

Temperature Compensating PSPICE® and SABER™ Models

-Available on the web at: www.fairchildsemi.com

Thermal Impedance PSPICE and SABER Models

Peak Current vs Pulse Width Curve

UIS Rating Curve

Related Literature

-TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”

Symbol

D

G

S

Packaging

JEDEC STYLE TO-247

 

JEDEC TO-220AB

SOURCE

 

 

SOURCE

DRAIN

 

 

DRAIN

 

 

GATE

GATE

 

 

DRAIN

 

 

(FLANGE)

 

 

 

 

 

 

 

 

DRAIN (TAB)

JEDEC TO-263AB

GATE

 

DRAIN

(FLANGE)

 

SOURCE

 

 

Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html For severe environments, see our Automotive HUFA series.

All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.

©2001 Fairchild Semiconductor Corporation

HUF75329G3, HUF75329P3, HUF75329S3S Rev. B

HUF75329G3, HUF75329P3, HUF75329S3SOGM

Absolute Maximum Ratings T = 25oC, Unless Otherwise Specified

 

 

C

 

 

 

 

 

 

UNITS

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . .

. . VDSS

55

V

Drain to Gate Voltage (RGS = 20kΩ ) (Note 1) . . . . . . . . . . .

. . VDGR

55

V

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . VGS

±20

V

Drain Current

 

 

 

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ID

49

A

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . IDM

Figure 4

 

Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . EAS

Figures 6, 14, 15

 

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . PD

128

W

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . .

0.86

W/oC

Operating and Storage Temperature . . . . . . . . . . . . . . . . . .

TJ, TSTG

-55 to 175

oC

Maximum Temperature for Soldering

 

 

oC

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . .

. . . . . TL

300

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . .

. . . Tpkg

260

oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. TJ = 25oC to 150oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER

 

SYMBOL

 

 

TEST CONDITIONS

MIN

TYP

MAX

UNITS

 

 

 

 

 

 

 

 

 

 

 

 

 

OFF STATE SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Drain to Source Breakdown Voltage

 

BVDSS

ID = 250µA, VGS = 0V (Figure 11)

55

-

-

V

Zero Gate Voltage Drain Current

 

IDSS

VDS = 50V, VGS = 0V

-

-

1

µA

 

 

 

V

DS

= 45V, V

GS

= 0V, T = 150oC

-

-

250

µA

 

 

 

 

 

 

C

 

 

 

 

Gate to Source Leakage Current

 

IGSS

VGS = ±20V

 

 

 

-

-

±100

nA

ON STATE SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate to Source Threshold Voltage

 

VGS(TH)

VGS = VDS, ID = 250µA (Figure 10)

2

-

4

V

Drain to Source On Resistance

 

rDS(ON)

ID = 49A, VGS = 10V (Figure 9)

-

0.020

0.024

THERMAL SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Thermal Resistance Junction to Case

 

Rθ JC

(Figure 3)

 

 

 

-

-

1.17

oC/W

Thermal Resistance Junction to Ambient

 

Rθ JA

TO-247

 

 

 

-

-

30

oC/W

 

 

 

TO-220, TO-263

 

 

-

-

62

oC/W

SWITCHING SPECIFICATIONS (VGS = 10V)

 

 

 

 

 

 

 

 

 

 

 

Turn-On Time

 

tON

VDD = 30V, ID 49A,

-

-

105

ns

 

 

 

RL = 0.61Ω , VGS = 10V,

 

 

 

 

Turn-On Delay Time

 

td(ON)

-

12

-

ns

 

RGS = 9.1Ω

 

 

 

Rise Time

 

tr

 

 

 

-

58

-

ns

 

 

 

 

 

 

 

Turn-Off Delay Time

 

td(OFF)

 

 

 

 

 

 

-

33

-

ns

Fall Time

 

tf

 

 

 

 

 

 

-

33

-

ns

Turn-Off Time

 

tOFF

 

 

 

 

 

 

-

-

100

ns

GATE CHARGE SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Total Gate Charge

 

Qg(TOT)

VGS = 0V to 20V

 

VDD = 30V,

-

60

75

nC

 

 

 

 

 

 

 

 

ID 49A,

 

 

 

 

Gate Charge at 10V

 

Qg(10)

VGS = 0V to 10V

 

-

35

43

nC

 

 

RL = 0.61Ω

Threshold Gate Charge

 

Qg(TH)

VGS = 0V to 2V

 

Ig(REF) = 1.0mA

-

2.0

2.5

nC

 

 

 

 

 

 

 

 

(Figure 13)

 

 

 

 

Gate to Source Gate Charge

 

Qgs

 

 

 

 

 

-

5

-

nC

 

 

 

 

 

 

 

Gate to Drain “Miller” Charge

 

Q

 

 

 

 

 

 

-

13

-

nC

 

 

gd

 

 

 

 

 

 

 

 

 

 

©2001 Fairchild Semiconductor Corporation

HUF75329G3, HUF75329P3, HUF75329S3S Rev. B

Fairchild Semiconductor HUF75329G3, HUF75329P3, HUF75329S3S Datasheet

HUF75329G3, HUF75329P3, HUF75329S3S

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

 

 

 

 

 

 

 

CAPACITANCE SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

Input Capacitance

CISS

VDS = 25V, VGS = 0V,

-

1060

-

pF

 

 

f = 1MHz

 

 

 

 

Output Capacitance

COSS

-

405

-

pF

(Figure 12)

Reverse Transfer Capacitance

CRSS

 

-

95

-

pF

Source to Drain Diode Specifications

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

 

 

 

 

 

 

 

Source to Drain Diode Voltage

VSD

ISD = 49A

-

-

1.25

V

Reverse Recovery Time

trr

ISD = 49A, dISD/dt = 100A/ s

-

-

72

ns

Reverse Recovered Charge

QRR

ISD = 49A, dISD/dt = 100A/ s

-

-

120

nC

Typical Performance Curves

 

1.2

 

 

 

 

 

 

 

MULTIPLIER

1.0

 

 

 

 

 

 

 

0.8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DISSIPATION

0.6

 

 

 

 

 

 

 

0.4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

POWER

0.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

175

 

0

25

50

75

100

125

150

 

 

 

TC , CASE TEMPERATURE (oC)

 

 

 

60

 

 

 

 

 

 

(A)

50

 

 

 

 

 

 

 

 

 

 

 

 

 

CURRENT

40

 

 

 

 

 

 

30

 

 

 

 

 

 

, DRAIN

20

 

 

 

 

 

 

 

 

 

 

 

 

 

D

 

 

 

 

 

 

 

I

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

25

50

75

100

125

150

175

 

 

 

TC, CASE TEMPERATURE (oC)

 

 

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

 

 

 

TEMPERATURE

 

 

 

 

CASE TEMPERATURE

 

 

 

 

2

DUTY CYCLE - DESCENDING ORDER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

0.5

 

 

 

 

 

 

 

 

 

 

 

 

0.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IMPEDANCE

 

0.1

 

 

 

 

 

 

 

 

 

 

NORMALIZED

 

0.05

 

 

 

 

 

 

 

 

 

 

 

0.02

 

 

 

 

 

 

 

 

 

 

 

0.01

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PDM

 

0.1

 

 

 

 

 

 

 

 

 

 

 

,

THERMAL

 

 

 

 

 

 

 

 

 

 

 

 

Zθ JC

 

 

 

 

 

 

 

 

 

 

t1

 

 

 

 

 

 

 

 

 

 

NOTES:

t2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DUTY FACTOR: D = t1/t2

 

 

 

 

 

SINGLE PULSE

 

 

 

 

 

PEAK TJ = PDM x Zθ JC x Rθ JC + TC

 

 

 

0.01

-5

10

-4

-3

10

-2

10

-1

10

0

1

 

 

10

 

 

10

 

 

 

10

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

©2001 Fairchild Semiconductor Corporation

HUF75329G3, HUF75329P3, HUF75329S3S Rev. B

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