KA3525A |
SMPS CONTROLLER |
VOLTAGE-MODE PWM CONTROLLER
16-DIP
The KA3525A is a monolithic integrated circuit that Included all of the control circuit necessary for a pulse width modulating regulator. There are a voltage reference, an error amplifier, a pulse width modulator, an oscillator, under-voltage lockout, soft start circuit, and output drivers in the chip.
16-SOP-225A
FEATURES
∙5V ä1% Reference
∙Oscillator Sync Terminal
∙Internal Soft Start
∙Deadtime Control
∙Under-Voltage Lockout
ORDERING INFORMATION
BLOCK DIAGRAM
Device |
Package |
Operating Temperature |
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KA3525A |
16 DIP |
-30 ~ +85Î |
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KA3525AD |
16-SOP-225A |
-30 ~ +85Î |
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5.5K
43K |
5.5K |
Rev. B
©1999 Fairchild Semiconductor Corporation
KA3525A |
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SMPS CONTROLLER |
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ABSOLUTE MAXIMUM RATINGS |
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Characteristic |
Symbol |
Value |
Unit |
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Supply Voltage |
VCC |
40 |
V |
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Collector Supply Voltage |
VC |
40 |
V |
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Output Current, Sink or Source |
IO |
500 |
mA |
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Reference Output Current |
IREF |
50 |
mA |
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Oscillator Charging Current |
ICHG(OSC) |
5 |
mA |
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Power Dissipation (TA = 25Î) |
PD |
1000 |
m/W |
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Operating Temperature |
TOPR |
0 ~ +70 |
Î |
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Storage Temperature |
TSTG |
-65 ~ +150 |
Î |
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Lead Temperature (Soldering, 10 sec) |
TLEAD |
+300 |
Î |
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ELECTRICAL CHARACTERISTICS
(VCC = 20V, TA = -35Î to + 85Î, unless otherwise specified)
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Characteristic |
Symbol |
Test Conditions |
Min |
Typ |
Max |
Unit |
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REFERENCE SECTION |
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Reference Output Voltage |
VREF |
TJ = 25Î |
5.0 |
5.1 |
5.2 |
V |
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Line Regulation |
LVREF |
VCC = 8 to 35V |
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9 |
20 |
mV |
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Load Regulation |
LVREF |
IREF = 0 to 20mA |
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20 |
50 |
mV |
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Short Circuit Output Current |
ISC |
VREF = 0, TJ = 25Î |
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80 |
100 |
mA |
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Total Output Variation (Note 1) |
LVREF |
Line, Load and Temperature |
4.95 |
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5.25 |
V |
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Temperature Stability (Note 1) |
STT |
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20 |
50 |
mV |
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Long Term Stability (Note 1) |
ST |
TJ = 125Î, 1 KHRS |
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20 |
50 |
mV |
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OSCILLATOR SECTION |
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Initial Accuracy (Note 1, 2) |
ACCUR |
TJ = 25 |
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3 |
6 |
% |
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Frequency Change With Voltage |
Lf/LVCC |
VCC = 8 to 35V (Note 1, 2) |
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0.8 |
2 |
% |
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Maximum Frequency |
f(MAX) |
RT = 2K`, CT = 470pF |
400 |
430 |
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KHz |
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Minimum Frequency |
f(MIN) |
RT = 200K`, CT = 0.1sF |
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60 |
120 |
Hz |
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Clock Amplitude (Note 1, 2) |
V(CLK) |
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3 |
4 |
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V |
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Clock Width (Note 1, 2) |
tW(CLK) |
TJ = 25Î |
0.3 |
0.6 |
1 |
ss |
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Sync Threshold |
VTH(SYNC) |
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1.2 |
2 |
2.8 |
V |
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Sync Input Current |
II(SYNC) |
Sync = 3.5V |
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1.3 |
2.5 |
mA |
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