Fairchild Semiconductor KA7500B Datasheet

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KA7500B

SMPS Controller

Features

•Internal Regulator Provides a Stable 5V Reference Supply Trimmed to 5%

•Uncommitted Output TR for 200mA Sink or Source Current

•Output Control For Push-Pull or Single Ended Operation

•Variable Duty Cycle By Dead Time Control (Pin 4) Complete PWM Control Circuit

•On-Chip Oscillator With Master or Slave Operation

•Internal Circuit Prohibits Double Pulse at Either Output

Description

The KA7500B is used for the control circuit of the PWM switching regulator. The KA7500B consists of 5V reference voltage circuit, two error amplifiers, a flip flop, an output control circuit, a PWM comparator, a dead time comparator and an oscillator. This device can be operated in the switching frequency of 1kHz to 300kHz.

16-DIP

1

16-SOP

1

Internal Block Diagram

Rev. 1.0.0

©2002 Fairchild Semiconductor Corporation

KA7500B

Absolute Maximum Ratings

	Parameter	Symbol	Value	Unit
	Supply Voltage	VCC	42	V
	Collector Supply Voltage	VC	42	V
	Output Current	IO	250	mA
	Amplifier Input Voltage	VIN	VCC +0.3	V
	Power Dissipation (TA = 25° C)	PD	1 (KA7500B)	W
			0.9 (KA7500BD)
	Operating Temperature Range	TOPR	0 ~ +70	° C
	Storage Temperature Range	TSTG	-65 ~ +150	° C

2

KA7500B

Electrical Characteristics

(VCC = 20V, f = 10kHz, TA = 0° C to +70° C, unless otherwise specified)

	Parameter	Symbol	Conditions		Min.	Typ.	Max.	Unit
	REFERENCE SECTION
	Reference Output Voltage	VREF	IREF = 1mA		4.75	5.0	5.25	V
	Line Regulation	∆ VREF	VCC = 7V to 40V		-	2.0	25	mV
	Temperature Coefficient of VREF	∆ VREF/∆ T	TA = 0° C to 70° C		-	0.01	0.03	%/° C
	Load Regulation	∆ VREF	IREF = 1mA to 10mA		-	1.0	15	mV
	Short-Circuit Output Current	ISC	VREF = 0V		10	35	50	mA
	OSCILLATOR SECTION
	Oscillation Frequency	f	CT = 0.01µ F, RT = 12kΩ		-	10	-	kHz
	Frequency Change with Temperature	∆ f/∆ T	CT = 0.01µ F, RT = 12kΩ		-	-	2	%
	DEAD TIME CONTROL SECTION
	Input Bias Current	IBIAS	VCC = 15V, 0V≤ V4≤ 5.25V		-	-2.0	-10	µ A
	Maximum Duty Cycle	D(MAX)	VCC = 15V, V4 = 0V		45	-	-	%
			O.C Pin = VREF
	Input Threshold Voltage	VITH	Zero Duty Cycle		-	3.0	3.3	V
			Max. Duty Cycle		0	-	-
	ERROR AMP SECTION
	Input Offset Voltage	VIO	V3 = 2.5V		-	2.0	10	mV
	Input Offset Current	IIO	V3 = 2.5V		-	25	250	mA
	Input Bias Current	IBIAS	V3 = 2.5V		-	0.2	1.0	µ A
	Common Mode Input Voltage	VCM	7V ≤ VCC ≤	40V	-0.3	-	VCC	V
	Open-Loop Voltage Gain	GVO	0.5V ≤ V3 ≤	3 .5V	70	95	-	dB
	Unit-Gain Bandwidth (Note1)	BW		-	-	650	-	kHz
	PWM COMPARATOR SECTION
	Input Threshold Voltage	VITH	Zero Duty Cycle		-	4	4.5	V
	Input Sink Current	ISINK	V3=0.7V		-0.3	-0.7	-	mV
	OUTPUT SECTION
	Output Saturation Voltage	VCE(SAT)	VE = 0, IC = 200mA		-	1.1	1.3
	Common Emitter
								V
	Common Collector	VCC(SAT)	VC = 15V, IE = -200mA		-	1.5	2.5
	Collector Off-State Current	IC(OFF)	VCC = 40V, VCE = 40V		-	2	100	µ A
	Emitter Off-State Current	IE(OFF)	VCC = VC = 40V, VE = 0		-	-	-100
	TOTAL DEVICE
	Supply Current	ICC	Pin 6 = VREF, VCC = 15V		-	6	10	mA
	OUTPUT SWITCHING CHARACTERISTICS
	Rise Time	tR		-	-	-	-	-
	Common Emitter	-		-	-	100	200	ns
	Common Collector	-		-	-	100	200
	Fall Time	tF		-	-	-	-	-
	Common Emitter	-		-	-	25	100	ns
	Common Collector	-		-	-	40	100

Note:

1. This parameter, although guaranteed, is not 100% tested in production.

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