September 1997
Revised December 1999
FST3253
Dual 4:1 Multiplexer/Demultiplexer Bus Switch
General Description
The Fairchild Switch FST3253 is a dual 4:1 high-speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
When OE is LOW, S0 and S1 connect the A Port to the
selected B Port output. When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports.
Features
■4Ω switch connection between two ports.
■Minimal propagation delay through the switch.
■Low lCC.
■Zero bounce in flow-through mode.
■Control inputs compatible with TTL level.
Ordering Code:
Order Number |
Package Number |
Package Description |
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FST3253M |
M16A |
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow |
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FST3253QSC |
MQA16 |
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide |
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FST3253MTC |
MTC16 |
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram |
Connection Diagram |
Truth Table
Pin Descriptions
Pin Name |
Description |
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1, |
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2 |
Bus Switch Enables |
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OE |
OE |
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S0, S1 |
Select Inputs |
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A |
Bus A |
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B1, B2, B3, B4 |
Bus B |
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S1 |
S0 |
OE1 |
OE2 |
Function |
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X |
X |
H |
X |
Disconnect 1A |
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X |
X |
X |
H |
Disconnect 2A |
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L |
L |
L |
L |
A = |
B1 |
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L |
H |
L |
L |
A = |
B2 |
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H |
L |
L |
L |
A = |
B3 |
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H |
H |
L |
L |
A = |
B4 |
Switch Bus Multiplexer/Demultiplexer 4:1 Dual FST3253
© 1999 Fairchild Semiconductor Corporation |
DS500058 |
www.fairchildsemi.com |
FST3253
Absolute Maximum Ratings(Note 1) |
Recommended Operating |
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Supply Voltage (VCC) |
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− 0.5V to + 7.0V |
Conditions (Note 3) |
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DC Switch Voltage (VS) |
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− 0.5V to + 7.0V |
Power Supply Operating (VCC) |
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4.0V to 5.5V |
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DC Input Voltage (VIN)(Note 2) |
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− 0.5V to + 7.0V |
Input Voltage (VIN) |
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0V to 5.5V |
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DC Input Diode Current (lIK) VIN< 0V |
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− 50mA |
Output Voltage (VOUT) |
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0V to 5.5V |
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DC Output (IOUT) Sink Current |
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128mA |
Input Rise and Fall Time (tr, tf) |
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DC VCC/GND Current (ICC/IGND) |
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+ /− |
100mA |
Switch Control Input |
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0ns/V to 5ns/V |
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Storage Temperature Range (TSTG) |
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− 65° C to + 150 ° C |
Switch I/O |
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0ns/V to DC |
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Free Air Operating Temperature (TA) |
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− 40 ° C to − 85 ° C |
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Note 1: The Absolute Maximum Ratings are those values beyond which |
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the safety of the device cannot be guaranteed. The device should not be |
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operated at these limits. The parametric values defined in the Electrical |
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Characteristics tables are not guaranteed at the absolute maximum rating. |
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The Recommended Operating Conditions tables will define the conditions |
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for actual device operation. |
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Note 2: The input and output negative voltage ratings may be exceeded if |
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the input and output diode current ratings are observed. |
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Note 3: Unused control inputs must be held HIGH or LOW. They may not |
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float. |
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DC Electrical Characteristics |
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VCC |
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TA = − 40 ° C to + 85 ° C |
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Symbol |
Parameter |
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Units |
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Conditions |
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(V) |
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Min |
Typ |
Max |
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(Note 4) |
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VIK |
Clamp Diode Voltage |
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4.5 |
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− 1.2 |
V |
IIN = − |
18mA |
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VIH |
High Level Input Voltage |
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4.0–5.5 |
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2.0 |
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V |
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VIL |
Low Level Input Voltage |
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4.0–5.5 |
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0.8 |
V |
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II |
Input Leakage Current |
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5.5 |
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± 1.0 |
µ |
A |
0≤ VIN ≤ 5.5V |
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IOZ |
OFF-STATE Leakage Current |
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5.5 |
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± 1.0 |
µ |
A |
0 ≤ A, B ≤ VCC |
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RON |
Switch On Resistance |
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4.5 |
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4 |
7 |
Ω |
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VIN = |
0V, IIN = |
64mA |
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(Note 5) |
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4.5 |
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4 |
7 |
Ω |
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VIN = |
0V, IIN = |
30mA |
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4.5 |
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8 |
15 |
Ω |
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VIN = |
2.4V, IIN = |
15mA |
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4.0 |
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11 |
20 |
Ω |
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VIN = |
2.4V, IIN = |
15mA |
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ICC |
Quiescent Supply Current |
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5.5 |
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3 |
µ |
A |
VIN = |
VCC or GND, IOUT = 0 |
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∆ ICC |
Increase in ICC per Input |
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5.5 |
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2.5 |
mA |
One input at 3.4V |
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Other inputs at VCC or GND |
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Note 4: Typical |
values are at VCC = 5.0V and TA = |
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25° C |
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Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins.
www.fairchildsemi.com |
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