Fairchild Semiconductor HUF75307D3, HUF75307D3S Datasheet

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HUF75307P3, HUF75307D3, HUF75307D3S

 

Data Sheet

December 2001

 

 

 

 

 

 

15A, 55V, 0.090 Ohm, N-Channel UltraFET

Power MOSFETs

These N-Channel power MOSFETs are manufactured using the innovative UltraFET® process. This advanced process technology

achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, lowvoltage bus switches, and power management in portable and battery-operated products.

Formerly developmental type TA75307.

Ordering Information

PART NUMBER

PACKAGE

BRAND

 

 

 

HUF75307P3

TO-220AB

75307P

 

 

 

HUF75307D3

TO-251AA

75307D

 

 

 

HUF75307D3S

TO-252AA

75307D

 

 

 

NOTE: When ordering, use the entire part number. Add the suffix T to obtain the TO-252AA variant in tape and reel, e.g., HUF75307D3ST.

Features

15A, 55V

Simulation Models

-Temperature Compensated PSPICE® and SABERModels

-SPICE and SABER Thermal Impedance Models Available on the WEB at: www.fairchildsemi.com

Peak Current vs Pulse Width Curve

UIS Rating Curve

Related Literature

-TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”

Symbol

D

G

S

Packaging

 

JEDEC TO-220AB

JEDEC TO-251AA

 

 

SOURCE

SOURCE

 

 

DRAIN

DRAIN

 

 

GATE

GATE

 

 

 

DRAIN

 

(FLANGE)

DRAIN

 

 

 

(FLANGE)

 

 

 

 

JEDEC TO-252AA

DRAIN (FLANGE)

GATE

SOURCE

Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html For severe environments, see our Automotive HUFA series.

All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.

©2001 Fairchild Semiconductor Corporation

HUF75307P3, HUF75307D3, HUF75307D3S Rev. B

HUF75307P3, HUF75307D3, HUF75307D3S

Absolute Maximum Ratings T = 25oC, Unless Otherwise Specified

 

 

 

C

 

 

 

 

 

 

UNITS

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . VDSS

55

V

Drain to Gate Voltage (RGS = 20kΩ ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . VDGR

55

V

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . VGS

±20

V

Drain Current

 

 

 

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . ID

15

A

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . IDM

Figure 4

 

Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . EAS

Figures 6, 14, 15

 

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . PD

45

W

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . .

0.3

W/oC

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TJ, TSTG

-55 to 175

oC

Maximum Temperature for Soldering

 

 

oC

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . TL

300

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . Tpkg

260

oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. TJ = 25oC to 150oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER

 

SYMBOL

 

 

 

TEST CONDITIONS

MIN

TYP

MAX

UNITS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OFF STATE SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Drain to Source Breakdown Voltage

 

BVDSS

ID = 250µA, VGS = 0V (Figure 11)

55

-

-

V

Zero Gate Voltage Drain Current

 

IDSS

VDS = 50V, VGS = 0V

-

-

1

µA

 

 

 

V

DS

= 45V, V

GS

= 0V, T = 150oC

-

-

250

µA

 

 

 

 

 

 

 

C

 

 

 

 

Gate to Source Leakage Current

 

IGSS

VGS = ±20V

 

 

 

-

-

±100

nA

ON STATE SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate to Source Threshold Voltage

 

VGS(TH)

VGS = VDS, ID = 250µA (Figure 10)

2

-

4

V

Drain to Source On Resistance

 

rDS(ON)

ID = 15A, VGS = 10V (Figure 9)

-

0.075

0.090

THERMAL SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Thermal Resistance Junction to Case

 

Rθ JC

(Figure 3)

 

 

 

 

-

-

3.3

oC/W

Thermal Resistance Junction to Ambient

 

Rθ JA

TO-220AB

 

 

 

-

-

62

oC/W

 

 

 

TO-251AA, TO-252AA

-

-

100

oC/W

SWITCHING SPECIFICATIONS (VGS = 10V)

 

 

 

 

 

 

 

 

 

 

 

 

Turn-On Time

 

tON

VDD = 30V, ID 15A,

-

-

60

ns

 

 

 

RL = 2.0Ω

, VGS = 10V,

 

 

 

 

Turn-On Delay Time

 

td(ON)

-

7

-

ns

 

RGS = 100Ω

 

 

 

Rise Time

 

tr

 

 

 

 

 

 

 

-

40

-

ns

Turn-Off Delay Time

 

td(OFF)

 

 

 

 

 

 

 

-

35

-

ns

Fall Time

 

tf

 

 

 

 

 

 

 

-

45

-

ns

Turn-Off Time

 

tOFF

 

 

 

 

 

 

 

-

-

100

ns

GATE CHARGE SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Total Gate Charge

 

Qg(TOT)

VGS = 0V to 20V

 

VDD = 30V,

-

16

20

nC

 

 

 

 

 

 

 

 

 

ID 15A,

 

 

 

 

Gate Charge at 10V

 

Qg(10)

VGS = 0V to 10V

 

-

9

11

nC

 

 

RL = 2.0Ω

Threshold Gate Charge

 

Qg(TH)

VGS = 0V to 2V

 

Ig(REF) = 1.0mA

-

0.6

0.8

nC

 

 

 

 

 

 

 

 

 

(Figure13)

 

 

 

 

Gate to Source Gate Charge

 

Qgs

 

 

 

 

 

 

-

1.2

-

nC

 

 

 

 

 

 

 

 

Reverse Transfer Capacitance

 

Qgd

 

 

 

 

 

 

 

-

4

-

nC

©2001 Fairchild Semiconductor Corporation

HUF75307P3, HUF75307D3, HUF75307D3S Rev. B

Fairchild Semiconductor HUF75307D3, HUF75307D3S Datasheet

HUF75307P3, HUF75307D3, HUF75307D3S

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

 

 

 

 

 

 

 

CAPACITANCE SPECIFICATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

Input Capacitance

CISS

VDS = 25V, VGS = 0V,

-

250

-

pF

 

 

f = 1MHz

 

 

 

 

Output Capacitance

COSS

-

100

-

pF

(Figure 12)

Reverse Transfer Capacitance

CRSS

 

-

25

-

pF

Source to Drain Diode Specifications

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

 

 

 

 

 

 

 

Source to Drain Diode Voltage

VSD

ISD = 15A

-

-

1.25

V

Reverse Recovery Time

trr

ISD = 15A, dISD/dt = 100A/ s

-

-

45

ns

Reverse Recovered Charge

QRR

ISD = 15A, dISD/dt = 100A/ s

-

-

55

nC

Typical Performance Curves

 

1.2

 

 

 

 

 

 

 

MULTIPLIER

1.0

 

 

 

 

 

 

 

0.8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DISSIPATION

0.6

 

 

 

 

 

 

 

0.4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

POWER

0.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

0

25

50

75

100

125

150

175

 

 

 

TC , CASE TEMPERATURE (oC)

 

 

 

20

 

 

 

 

 

 

(A)

15

 

 

 

 

 

 

CURRENT

 

 

 

 

 

 

10

 

 

 

 

 

 

, DRAIN

5

 

 

 

 

 

 

D

 

 

 

 

 

 

I

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

25

50

75

100

125

150

175

 

 

 

TC, CASE TEMPERATURE (oC)

 

 

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

 

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

 

 

 

TEMPERATURE

 

 

CASE TEMPERATURE

 

 

 

2

DUTY CYCLE - DESCENDING ORDER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

0.5

 

 

 

 

 

 

 

 

0.2

 

 

 

 

 

 

 

IMPEDANCE

 

 

 

 

 

 

 

NORMALIZED

 

0.1

 

 

 

 

 

 

 

0.05

 

 

 

 

 

 

 

0.02

 

 

 

 

 

 

 

0.01

 

 

 

 

PDM

 

 

 

 

 

 

 

 

0.1

 

 

 

 

 

 

 

,

THERMAL

 

 

 

 

 

 

t1

 

Zθ JC

 

 

 

 

 

 

 

 

 

 

 

 

 

t2

 

 

 

 

 

 

 

NOTES:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SINGLE PULSE

 

 

 

DUTY FACTOR: D = t1/t2

 

 

 

 

 

 

 

 

PEAK TJ = PDM x Zθ JC x Rθ JC + TC

 

 

 

 

 

 

 

 

 

 

 

 

0.01

 

 

 

 

 

 

 

 

 

10-5

10-4

10-3

10-2

10-1

100

101

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

©2001 Fairchild Semiconductor Corporation

HUF75307P3, HUF75307D3, HUF75307D3S Rev. B

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