Fairchild Semiconductor KA3845BD, KA3845B, KA3843BD, KA3843B, KA3842BD Datasheet

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KA3842B/KA3843B/KA3844B/KA3845B

SMPS Controller

Features		Description
• Low Start Up Current		The KA3842B/KA3843B/KA3844B/KA3845B are fixed
•	Maximum Duty Clamp	frequency current-mode PWM controller. They are spe-
•	UVLO With Hysteresis	cially designed for Off - Line and DC-to-DC converter
• Operating Frequency Up To 500KHz		applications with minimum external components. These
		integrated circuits feature a trimmed oscillator for precise
		duty cycle control, a temperature compensated reference,
		high gain error amplifier. current sensing comparator, and a
		high current totempole output Ideally suited for driving a
		power MOSFET. Protection circuity Includes built in
		under-voltage lockout and current limiting. The KA3842B
		and KA3844B have UVLO thresholds of 16V (on) and
		10V (off) The KA3843B and KA3845B are 8.5V (on) and

7.9V (off) The KA3842B and KA3843B can operate within

100% duty cycle. The KA3844B and KA3845B can operate with 50% duty cycle.

8-DIP

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14-SOP

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Rev. 5.0

©2000 Fairchild Semiconductor International

KA3842B/KA3843B/KA3844B/KA3845B

Internal Block Diagram

Absolute Maximum Ratings

Parameter	Symbol	Value	Unit
Supply Voltage	VCC	30	V
Output Current	IO	± 1	A
Analog Inputs (Pin 2.3)	V(ANA)	-0.3 to 6.3	V
Error Amp Output Sink Current	ISINK (E.A)	10	mA
Power Dissipation (TA = 25° C)	PD	1	W

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KA3842B/KA3843B/KA3844B/KA3845B

Electrical Characteristics

(VCC=15V, RT=10KΩ , CT=3.3nF, TA= 0° C to +70° C, unless otherwise specified)

Parameter	Symbol		Conditions		Min.	Typ.	Max.	Unit
REFERENCE SECTION
Reference Output Voltage	VREF	TJ = 25° C, IREF = 1mA			4.90	5.00	5.10	V
Line Regulation	∆ VREF	12V≤ VCC≤ 25V			-	6	20	mV
Load Regulation	∆ VREF	1mA≤ IREF≤ 20mA			-	6	25	mV
Short Circuit Output Current	ISC	TA = 25° C			-	-100	-180	mA
OSCILLATOR SECTION
Oscillation Frequency	f	TJ = 25° C			47	52	57	KHz
Frequency Change with Voltage	∆ f/∆ VCC	12V≤ VCC≤ 25V			-	0.05	1	%
Oscillator Amplitude	VOSC		-		-	1.6	-	VP-P
ERROR AMPLIFIER SECTION
Input Bias Current	IBIAS		-		-	-0.1	-2	µ A
Input Voltage	VI(E>A)	V1 = 2.5V			2.42	2.50	2.58	V
Open Loop Voltage Gain	GVO	2V≤	VO ≤ 4V		65	90	-	dB
Power Supply Rejection Ratio	PSRR	12V≤	VCC ≤ 25V		60	70	-	dB
Output Sink Current	ISINK	V2 = 2.7V, V1 = 1.1V			2	7	-	mA
Output Source Current	ISOURCE	V2 = 2.3V, V1 = 5V			-0.6	-1.0	-	mA
High Output Voltage	VOH	V2 = 2.3V, RL = 15KΩ		to GND	5	6	-	V
Low Output Voltage	VOL	V2 = 2.7V, RL = 15KΩ		to Pin 8	-	0.8	1.1	V
CURRENT SENSE SECTION
Gain	GV	(Note 1 & 2)			2.85	3	3.15	V/V
Maximum Input Signal	VI(MAX)	V1 = 5V(Note 1)			0.9	1	1.1	V
Power Supply Rejection Ratio	PSRR	12V≤	VCC ≤ 25V (Note 1)		-	70	-	dB
Input Bias Current	IBIAS		-		-	-3	-10	µ A
OUTPUT SECTION
Low Output Voltage	VOL	ISINK = 20mA			-	0.08	0.4	V
		ISINK = 200mA			-	1.4	2.2	V
High Output Voltage	VOH	ISOURCE = 20mA			13	13.5	-	V
		ISOURCE = 200mA			12	13.0	-	V
Rise Time	tR	TJ = 25° C, CL= 1nF (Note 3)			-	45	150	ns
Fall Time	tF	TJ = 25° C, CL= 1nF (Note 3)			-	35	150	ns
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold	VTH(ST)	KA3842B/KA3844B			14.5	16.0	17.5	V
		KA3843B/KA3845B			7.8	8.4	9.0	V
Min. Operating Voltage	VOPR(MIN)	KA3842B/KA3844B			8.5	10.0	11.5	V
(After Turn On)		KA3843B/KA3845B			7.0	7.6	8.2	V

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KA3842B/KA3843B/KA3844B/KA3845B

Electrical Characteristics (Continued)

(VCC=15V, RT=10KΩ , CT=3.3nF, TA= 0° C to +70° C unless otherwise specified)

Parameter	Symbol	Conditions	Min.	Typ.	Max.	Unit
PWM SECTION
Max. Duty Cycle	D(max)	KA3842B/KA3843B	95	97	100	%
	D	KA3844B/KA3845B	47	48	50	%
Min. Duty Cycle	D(MIN)	-	-	-	0	%
TOTAL STANDBY CURRENT
Start-Up Current	IST	-	-	0.45	1	mA
Operating Supply Current	ICC(OPR)	V3=V2=ON	-	14	17	mA
Zener Voltage	VZ	ICC = 25mA	30	38	-	V

Adjust VCC above the start threshould before setting at 15V

Note:

1.Parameter measured at trip point of latch

2.Gain defined as:

A	∆ V1	,0 ≤ V3 ≤ 0.8V
	= ----------
	∆ V3

3.These parameters, although guaranteed, are not 100 tested in production.

Figure 1. Open Loop Test Circuit

High peak currents associated with capacitive loads necessitate careful grounding techniques Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and 5KΩ potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3.

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