July 1998
54AC157 · 54ACT157 Quad 2-Input Multiplexer
General Description
The 'AC/'ACT157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form. The 'AC/ 'ACT157 can also be used as a function generator.
Features
nICC and IOZ reduced by 50%
nOutputs source/sink 24 mA
n'ACT157 has TTL-compatible inputs
nStandard Microcircuit Drawing (SMD)
Ð'AC157: 5962-89539
Ð'ACT157: 5962-89688
Logic Symbols
IEEE/IEC
DS100272-1
DS100272-2
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Pin Names |
Description |
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I0a±I0d |
Source 0 Data Inputs |
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I1a±I1d |
Source 1 Data Inputs |
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E |
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Enable Input |
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S |
Select Input |
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Za±Zd |
Outputs |
Connection Diagrams
Pin Assignment |
Pin Assignment |
for DIP and Flatpak |
for LCC |
DS100272-3 |
DS100272-4 |
FACT™ is a trademark of Fairchild Semiconductor Corporation.
Multiplexer Input-2 Quad 54ACT157 · 54AC157
© 1998 National Semiconductor Corporation |
DS100272 |
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Functional Description
The 'AC/'ACT157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The 'AC/'ACT157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below:
Za = E · (I1a · S + I0a · S)
Zb = E · (I1b · S + I0b · S)
Zc = E · (I1c · S + I0c · S)
Zd = E · (I1d · S + I0d · S)
A common use of the 'AC/ACT157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The 'AC/'ACT157 can generate any four
Logic Diagram
of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.
Truth Table
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Inputs |
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Outputs |
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E |
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S |
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I0 |
I1 |
Z |
H |
X |
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X |
X |
L |
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L |
H |
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X |
L |
L |
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L |
H |
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X |
H |
H |
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L |
L |
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L |
X |
L |
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L |
L |
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H |
X |
H |
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H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
DS100272-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2 |
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (VCC) |
−0.5V to +7.0V |
DC Input Diode Current (IIK) |
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VI = −0.5V |
−20 mA |
VI = VCC + 0.5V |
+20 mA |
DC Input Voltage (VI) |
−0.5V to V CC + 0.5V |
DC Output Diode Current (IOK) |
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VO = −0.5V |
−20 mA |
VO = VCC + 0.5V |
+20 mA |
DC Output Voltage (VO) |
−0.5V to V CC + 0.5V |
DC Output Source |
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or Sink Current (IO) |
±50 mA |
DC VCC or Ground Current |
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per Output Pin (ICC or IGND) |
±50 mA |
Storage Temperature (TSTG) |
−65ÊC to +150ÊC |
Junction Temperature (TJ) |
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CDIP |
175ÊC |
Recommended Operating
Conditions
Supply Voltage (VCC) |
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'AC |
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2.0V to 6.0V |
'ACT |
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4.5V to 5.5V |
Input Voltage (VI) |
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0V to VCC |
Output Voltage (VO) |
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0V to VCC |
Operating Temperature (TA) |
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54AC/ACT |
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−55ÊC to +125ÊC |
Minimum Input Edge Rate ( |
V/ |
t) |
'AC Devices |
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VIN from 30% to 70% of VCC |
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VCC @ 3.3V, 4.5V, 5.5V |
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125 mV/ns |
Minimum Input Edge Rate ( |
V/ |
t) |
'ACT Devices |
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VIN from 0.8V to 2.0V |
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VCC @ 4.5V, 5.5V |
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125 mV/ns |
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT™ circuits outside databook specifications.
DC Characteristics for 'AC Family Devices
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54AC |
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Symbol |
Parameter |
VCC |
TA = |
Units |
Conditions |
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(V) |
−55ÊC to +125ÊC |
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Guaranteed Limits |
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VIH |
Minimum High Level |
3.0 |
2.1 |
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VOUT = 0.1V |
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Input Voltage |
4.5 |
3.15 |
V |
or VCC − 0.1V |
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5.5 |
3.85 |
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VIL |
Maximum Low Level |
3.0 |
0.9 |
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VOUT = 0.1V |
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Input Voltage |
4.5 |
1.35 |
V |
or VCC − 0.1V |
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5.5 |
1.65 |
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VOH |
Minimum High Level |
3.0 |
2.9 |
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IOUT = −50 µA |
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Output Voltage |
4.5 |
4.4 |
V |
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5.5 |
5.4 |
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(Note 2) |
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VIN = VIL or VIH |
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3.0 |
2.4 |
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IOH = −12 mA |
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4.5 |
3.7 |
V |
IOH = −24 mA |
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5.5 |
4.7 |
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IOH = −24 mA |
VOL |
Maximum Low Level |
3.0 |
0.1 |
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IOUT = 50 µA |
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Output Voltage |
4.5 |
0.1 |
V |
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5.5 |
0.1 |
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(Note 2) |
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VIN = VIL or VIH |
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3.0 |
0.50 |
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IOL = 12 mA |
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4.5 |
0.50 |
V |
IOL = 24 mA |
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5.5 |
0.50 |
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IOL = 24 mA |
IIN |
Maximum Input |
5.5 |
±1.0 |
µA |
VI = VCC, GND |
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Leakage Current |
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IOLD |
Minimum Dynamic |
5.5 |
50 |
mA |
VOLD = 1.65V Max |
IOHD |
Output Current (Note 3) |
5.5 |
−50 |
mA |
V OHD = 3.85V Min |
3 |
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