NSC 5962-9214701VSA, 5962-9214701V2A, 5962-9214701QSA, 5962-9214701QRA, 5962-9214701Q2A Datasheet
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July 1998
54ABT244
Octal Buffer/Line Driver with TRI-STATE® Outputs
General Description
The 'ABT244 is an octal buffer and line driver with TRI-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver.
Features
nNon-inverting buffers
nOutput sink capability of 48 mA, source capability of 24 mA
nOutput switching specified for both 50 pF and 250 pF loads
nGuaranteed simultaneous switching, noise level and dynamic threshold performance
nGuaranteed latchup protection
nHigh impedance glitch free bus loading during entire power up and power down cycle
nNondestructive hot insertion capability
nDisable time less than enable time to avoid bus contention
nStandard Microcircuit Drawing (SMD) 5962-9214701
Ordering Code
Military |
Package |
Package Description |
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Number |
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54ABT244J-QML |
J20A |
20-Lead Ceramic Dual-In-Line |
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54ABT244W-QML |
W20A |
20-Lead Cerpack |
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54ABT244E-QML |
E20A |
20-Lead Ceramic Leadless Chip Carrier, Type C |
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Connection Diagrams
Pin Assignment for |
Pin Assignment for LCC |
DIP and Flatpak |
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DS100203-2 |
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DS100203-1 |
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Truth Table |
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Pin |
Description |
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Names |
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OE1 |
I0±3 |
O0±3 |
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OE2 |
I4±7 |
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O4±7 |
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Output Enable Input |
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OE |
1, |
OE |
2 |
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H |
X |
Z |
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H |
X |
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Z |
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(Active Low) |
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L |
H |
H |
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L |
H |
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H |
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I0±I7 |
Inputs |
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L |
L |
L |
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L |
L |
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L |
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O0±O7 |
Outputs |
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H = HIGH Voltage Level |
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L = LOW Voltage Level |
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X = Immaterial |
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Z = High Impedance |
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TRI-STATE® is a registered trademark of National Semiconductor Corporation.
Outputs STATE-TRI with Driver Buffer/Line Octal 54ABT244
© 1998 National Semiconductor Corporation |
DS100203 |
www.national.com |
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Storage Temperature |
−65ÊC to +150ÊC |
Ambient Temperature under Bias |
−55ÊC to +125ÊC |
Junction Temperature under Bias |
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Ceramic |
−55ÊC to +175ÊC |
VCC Pin Potential to Ground Pin |
−0.5V to +7.0V |
Input Voltage (Note 2) |
−0.5V to +7.0V |
Input Current (Note 2) |
−30 mA to +5.0 mA |
Voltage Applied to Any Output |
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in the Disabled or |
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Power-Off State |
−0.5V to 5.5V |
in the HIGH State |
−0.5V to V CC |
Current Applied to Output |
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in LOW State (Max) |
twice the rated IOL (mA) |
DC Latchup Source Current |
−500 mA |
Over Voltage Latchup (I/O) |
10V |
Recommended Operating
Conditions
Free Air Ambient Temperature |
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Military |
−55ÊC to +125ÊC |
Supply Voltage |
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Military |
+4.5V to +5.5V |
Minimum Input Edge Rate |
( V/ t) |
Data Input |
50 mV/ns |
Enable Input |
20 mV/ns |
DC Electrical Characteristics
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Symbol |
Parameter |
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ABT244 |
Units |
VCC |
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Conditions |
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Min |
Typ Max |
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VIH |
Input HIGH Voltage |
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2.0 |
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V |
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Recognized HIGH Signal |
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VIL |
Input LOW Voltage |
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0.8 |
V |
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Recognized LOW Signal |
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VCD |
Input Clamp Diode Voltage |
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−1.2 |
V |
Min |
I IN = −18 mA |
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VOH |
Output HIGH Voltage |
54ABT |
2.5 |
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V |
Min |
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IOH = −3 mA |
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54ABT |
2.0 |
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V |
Min |
IOH = −24 mA |
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VOL |
Output LOW Voltage |
54ABT |
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0.55 |
V |
Min |
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IOL = 48 mA |
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IIH |
Input HIGH Current |
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5 |
µA |
Max |
VIN = 2.7V (Note 4) |
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5 |
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VIN = VCC |
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IBVI |
Input HIGH Current Breakdown Test |
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7 |
µA |
Max |
VIN = 7.0V |
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IIL |
Input LOW Current |
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−5 |
µA |
Max |
V IN = 0.5V (Note 4) |
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−5 |
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V IN = 0.0V |
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VID |
Input Leakage Test |
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4.75 |
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V |
0.0 |
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IID = 1.9 µA |
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All Other Pins Grounded |
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IOZH |
Output Leakage Current |
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50 |
µA |
0 − 5.5V |
V OUT = 2.7V; |
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n = 2.0V |
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OE |
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IOZL |
Output Leakage Current |
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−50 |
µA |
0 − 5.5V |
V OUT = 0.5V; |
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n = 2.0V |
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OE |
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IOS |
Output Short-Circuit Current |
−100 |
−275 |
mA |
Max |
V OUT = 0.0V |
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ICEX |
Output High Leakage Current |
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50 |
µA |
Max |
VOUT = VCC |
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IZZ |
Bus Drainage Test |
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100 |
µA |
0.0 |
VOUT = 5.5V; All Others GND |
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ICCH |
Power Supply Current |
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50 |
µA |
Max |
All Outputs HIGH |
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ICCL |
Power Supply Current |
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30 |
mA |
Max |
All Outputs LOW |
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ICCZ |
Power Supply Current |
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50 |
µA |
Max |
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n = VCC; |
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OE |
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All Others at VCC or Ground |
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ICCT |
Additional ICC/Input |
Outputs Enabled |
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2.5 |
mA |
Max |
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VI = VCC − 2.1V |
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Outputs TRI-STATE |
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2.5 |
mA |
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Enable Input VI = VCC − 2.1V |
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Outputs TRI-STATE |
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50 |
µA |
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Data Input VI = VCC − 2.1V |
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All Others at VCC or Ground |
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ICCD |
Dynamic ICC |
No Load |
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mA/ |
Max |
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Outputs Open |
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(Note 4) |
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0.1 |
MHz |
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OE |
n = GND, (Note 3) |
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One Bit Toggling, 50% Duty Cycle |
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Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Note 3: For 8 bits toggling, ICCD < 0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
www.national.com |
2 |
AC Electrical Characteristics
Symbol |
Parameter |
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54ABT |
Units |
Fig. |
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No. |
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TA = −55ÊC to +125ÊC |
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VCC = 4.5V±5.5V |
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CL = 50 pF |
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Min |
Max |
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tPLH |
Propagation Delay |
1.0 |
5.3 |
ns |
Figure 5 |
tPHL |
Data to Outputs |
1.0 |
5.0 |
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tPZH |
Output Enable |
0.8 |
6.5 |
ns |
Figure 4 |
tPZL |
Time |
1.2 |
7.9 |
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tPHZ |
Output Disable |
1.2 |
7.6 |
ns |
Figure 4 |
tPLZ |
Time |
1.0 |
7.9 |
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Capacitance
Symbol |
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Parameter |
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Typ |
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Units |
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Conditions |
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TA = 25ÊC |
CIN |
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Input Capacitance |
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5.0 |
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pF |
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VCC = 0V |
COUT (Note 5) |
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Output Capacitance |
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9.0 |
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pF |
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VCC = 5.0V |
Note 5: COUT is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012. |
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tPLH vs Temperature (TA) |
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tPHL vs Temperature (TA) |
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CL = 50 pF, 1 Output Switching |
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CL = 50 pF, 1 Output Switching |
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DS100203-11 |
DS100203-12 |
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
3 |
www.national.com |
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