NSC ADC0841CCN, ADC0841CCJ, ADC0841BCV, ADC0841BCN, ADC0841CCVX Datasheet

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May 1998

ADC0841

8-Bit µP Compatible A/D Converter

General Description

The ADC0841 is a CMOS 8-bit successive approximation A/D converter. Differential inputs provide low frequency input common mode rejection and allow offsetting the analog range of the converter. In addition, the reference input can be adjusted enabling the conversion of reduced analog ranges with 8-bit resolution.

The A/D is designed to operate with the control bus of a variety of microprocessors. TRI-STATE® output latches that directly drive the data bus permit the A/D to be configured as a memory location or I/O device to the microprocessor with no interface logic necessary.

Features

n Easy interface to all microprocessors

nOperates ratiometrically or with 5 VDC voltage reference

nNo zero or full-scale adjust required

nInternal clock

n0V to 5V input range with single 5V power supply

n0.3" standard width 20-pin package

n20 Pin Molded Chip Carrier Package

Key Specifications

nResolution: 8 Bits

nTotal Unadjusted Error: ±1¤2 LSB and ± 1 LSB

nSingle Supply: 5 VDC

nLow Power: 15 mW

nConversion Time: 40 µs

Block and Connection Diagrams

 

DS008557-1

Dual-In-Line Package (N)

Molded Chip Carrier Package (V)

DS008557-2

(N.C.-No Connection)

DS008557-3

Top View

Top View

TRI-STATE® is a registered trademark of National Semiconductor Corporation.

NSC800is a trademark of National Semiconductor Corporation.

Converter A/D Compatible µP Bit-8 ADC0841

© 1999 National Semiconductor Corporation

DS008557

www.national.com

Absolute Maximum Ratings (Notes 1, 2)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage (VCC)

6.5V

Voltage

 

Logic Control Inputs

−0.3V to V CC+0.3V

At Other Inputs and Outputs

−0.3V to V CC+0.3V

Input Current Per Pin (Note 3)

±5 mA

Input Current Per Package (Note 3)

±20 mA

Storage Temperature

−65ÊC to +150ÊC

Package Dissipation at TA=25ÊC

875 mW

Lead Temp. (Soldering, 10 seconds)

 

Dual-In-Line Package (Plastic)

 

Molded Chip Carrier Package

260ÊC

Vapor Phase (60 seconds)

215ÊC

Infrared (15 seconds)

220ÊC

ESD Susceptibility (Note 10)

800V

Operating Conditions (Notes 1, 2)

Supply Voltage (VCC)

4.5 VDC to 6.0 VDC

Temperature Range

TMINTATMAX

ADC0841BCN, ADC0841CCN

0ÊCTA70ÊC

ADC0841BCV, ADC0841CCV

−40ÊC TA85ÊC

Electrical Characteristics

The following specifications apply for VCC=5 VDC unless otherwise specified. Boldface limits apply from TMIN to TMAX; all other limits TA=Tj=25ÊC.

 

 

ADC0841BCN, ADC0841CCN

 

 

 

ADC0841BCV, ADC0841CCV

 

 

 

 

 

 

 

Parameter

Conditions

Typ

Tested

Design

Units

 

 

(Note 6)

Limit

Limit

 

 

 

 

(Note 7)

(Note 8)

 

 

 

 

 

 

 

CONVERTER AND MULTIPLEXER CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

Maximum Total

VREF=5.00 VDC

 

 

 

 

Unadjusted Error

(Note 4)

 

 

 

 

ADC0841BCN, BCV

 

 

±1¤2

± 1¤2

LSB

ADC0841CCN, CCV

 

 

±1

± 1

LSB

 

 

 

 

 

 

Minimum Reference

 

2.4

1.2

1.1

kΩ

Input Resistance

 

 

 

 

 

 

 

 

 

 

 

Maximum Reference

 

2.4

5.4

5.9

kΩ

Input Resistance

 

 

 

 

 

 

 

 

 

 

 

Maximum Common-Mode

(Note 5)

 

VCC+0.05

VCC+0.05

V

Input Voltage

 

 

 

 

 

 

 

 

 

 

 

Minimum Common-Mode

(Note 5)

 

GND−0.05

GND−0.05

V

Input Voltage

 

 

 

 

 

DC Common-Mode Error

Differential Mode

±1/16

±1¤4

± 1¤4

LSB

Power Supply Sensitivity

VCC=5V±5%

±1/16

±1¤8

± 1¤8

LSB

Electrical Characteristics

The following specifications apply for VCC=5 VDC unless otherwise specified. Boldface limits apply from TMIN to TMAX; all other limits TA=Tj=25ÊC.

 

 

 

ADC0841BCN, ADC0841CCN

 

 

 

 

ADC0841BCV, ADC0841CCV

 

 

 

 

 

 

 

 

Symbol

Parameter

Conditions

Typ

Tested

Design

Units

 

 

 

(Note 6)

Limit

Limit

 

 

 

 

 

(Note 7)

(Note 8)

 

 

 

 

 

 

 

 

DIGITAL AND DC CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

VIN(1)

Logical ª1º Input

VCC=5.25V

 

2.0

2.0

V

 

Voltage (Min)

 

 

 

 

 

VIN(0)

Logical ª0º Input

VCC=4.75V

 

0.8

0.8

V

 

Voltage (Max)

 

 

 

 

 

 

 

 

 

 

 

 

IIN(1)

Logical ª1º Input

VIN=5.0V

0.005

 

1

µA

 

Current (Max)

 

 

 

 

 

 

 

 

 

 

 

 

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2

Electrical Characteristics (Continued)

The following specifications apply for VCC=5 VDC unless otherwise specified. Boldface limits apply from TMIN to TMAX; all other limits TA=Tj=25ÊC.

 

 

 

 

 

ADC0841BCN, ADC0841CCN

 

 

 

 

 

 

ADC0841BCV, ADC0841CCV

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

 

 

Conditions

Typ

Tested

Design

Units

 

 

 

 

 

(Note 6)

Limit

Limit

 

 

 

 

 

 

 

(Note 7)

(Note 8)

 

 

 

 

 

 

 

 

 

 

DIGITAL AND DC CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIN(0)

Logical ª0º Input

 

VIN=0V

−0.005

 

−1

µA

 

Current (Max)

 

 

 

 

 

 

 

VOUT(1)

Logical ª1º

 

VCC=4.75V

 

 

 

 

 

Output Voltage (Min)

 

IOUT=−360 µA

 

2.8

2.4

V

 

 

 

IOUT=−10 µA

 

4.6

4.5

V

VOUT(0)

Logical ª0º

 

VCC=4.75V

 

0.34

0.4

V

 

Output Voltage (Max)

 

IOUT=1.6 mA

 

 

 

 

IOUT

TRI-STATE Output

 

VOUT=0V

−0.01

−0.3

−3

µA

 

Current (Max)

 

VOUT=5V

0.01

0.3

3

µA

ISOURCE

Output Source

 

VOUT=0V

−14

−7.5

−6.5

mA

 

Current (Min)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISINK

Output Sink

 

VOUT=VCC

16

9.0

8.0

mA

 

Current (Min)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC

Supply Current (Max)

 

 

=1, VREF Open

1

2.3

2.5

mA

 

CS

AC Characteristics

The following specifications apply for VCC = 5VDC, tr = tf = 10 ns unless otherwise specified. Boldface limits apply from TMIN to TMAX; all other limits TA = TJ = 25ÊC.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tested

Design

 

Symbol

 

 

 

 

 

 

 

 

Parameter

Conditions

Typ

Limit

Limit

Units

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Note 6)

(Note 7)

(Note 8)

 

tC

Maximum Conversion Time (See Graph)

 

30

40

60

µs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Minimum WR Pulse Width

(Note 9)

50

150

 

ns

tW(WR)

 

 

tACC

Maximum Access Time (Delay from Falling Edge

CL = 100 pF

145

225

 

ns

 

 

 

of

RD

to Output Data Valid)

(Note 9)

 

 

 

 

t1H, t0H

TRI-STATE Control (Maximum Delay from Rising

CL = 10 pF, RL = 10k,

125

 

200

ns

 

 

 

 

 

 

 

 

 

 

tr = 20 ns (Note 9)

 

 

 

 

 

 

 

Edge of

RD

to Hi-Z State)

 

 

 

 

tWI, tRI

 

 

 

 

 

 

 

 

 

 

Maximum Delay from Falling Edge of

WR

or

RD

to

(Note 9)

200

400

 

ns

 

 

 

Reset of

INTR

 

 

 

 

 

 

CIN

Capacitance of Logic Inputs

 

5

 

 

pF

COUT

Capacitance of Logic Outputs

 

5

 

 

pF

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its specified operating conditions.

Note 2: All voltages are measured with respect to the ground pins.

Note 3: During over-voltage conditions (VIN<0V and VIN>VCC) the maximum input current at any one pin is ±5 mA. If the current is limited to ±5 mA at all the pins no more than four pins can be in this condition in order to meet the Input Current Per Package (±20 mA) specification.

Note 4: Total unadjusted error includes offset, full-scale, and linearity.

Note 5: For VIN (−) ³ VIN (+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input, which will forward-conduct for analog input voltages one diode drop below ground or one diode drop greater than VCC supply. Be careful during testing at low VCC levels (4.5V), as high level analog inputs (5V) can cause this input diode to conduct, especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias of either diode. This means that as long as the analog VIN does not exceed the supply voltage by more than 50 mV, the output code will be correct. To achieve an absolute 0 VDC to 5 VDC input voltage range will therefore require a minimum supply voltage of 4.950 VDC over temperature variations, initial tolerance and loading.

Note 6: Typicals are at 25ÊC and represent most likely parametric norm.

Note 7: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).

Note 8: Design limits are guaranteed but not 100% production tested. These limits are not used to calculate outgoing quality levels.

Note 9: The temperature coefficient is 0.3%/ÊC.

Note 10: Human body model, 100 pF discharged through 1.5 kW resistor.

3

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NSC ADC0841CCN, ADC0841CCJ, ADC0841BCV, ADC0841BCN, ADC0841CCVX Datasheet

Timing Diagram

 

 

 

 

DS008557-9

Note 11: Read strobe must occur at least 600 ns after the assertion of interrupt to guarantee reset of

 

 

 

INTR.

 

Typical Performance Characteristics

 

Logic Input Threshold

Output Current vs

Power Supply Current vs

Voltage vs Supply Voltage

Temperature

Temperature

DS008557-23

DS008557-24

DS008557-25

 

Linearity Error vs VREF

Conversion Time vs VSUPPLY

Conversion Time vs

 

 

Temperature

DS008557-26

DS008557-27

DS008557-28

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4

Typical Performance Characteristics (Continued)

Unadjusted Offset Error vs

VREF Voltage

DS008557-22

TRI-STATE Test Circuits and Waveforms

t1H

t1H, CL = 10 pF

DS008557-6

DS008557-5

tr = 20 ns

t0H

t0H, CL = 10 pF

DS008557-8

DS008557-7

tr = 20 ns

5

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