August 1998
54AC821 · 54ACT821
10-Bit D Flip-Flop with TRI-STATE® Outputs
General Description
The 'AC/'ACT821 is a 10-bit D flip-flop with TRI-STATE outputs arranged in a broadside pinout.
The 'AC/'ACT821 is functionally identical to the AM29821.
Features
n TRI-STATE outputs for bus interfacing
nNoninverting outputs
nOutputs source/sink 24 mA
n'ACT821 has TTL-compatible inputs
nStandard Microcircuit Drawing (SMD)
Ð'ACT821: 5962-88705
Ð'AC821: 5962-91606
Logic Symbols |
Connection Diagrams |
Pin Assignment for DIP and Flatpak
DS100355-1
IEEE/IEC
DS100355-3
Pin Assignment for LCC
|
|
|
DS100355-2 |
|
|
|
|
|
|
Pin Names |
Description |
|
D0±D9 |
Data Inputs |
|
|
O0±O9 |
Data Outputs |
|
|
|
Output Enable Input |
|
|
OE |
|
|
|
CP |
Clock Input |
DS100355-4
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
Outputs STATE-TRI with Flop-Flip D Bit-10 54ACT821 · 54AC821
© 1998 National Semiconductor Corporation |
DS100355 |
www.national.com |
Functional Description
The 'AC/'ACT821 consists of ten D-type edge-triggered flip-flops. The buffered Clock (CP) and buffered Output Enable (OE) are common to all flip-flops. The flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH CP transition. With OE LOW the contents of the flip-flops are available at
the outputs. When OE is HIGH the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops.
The 'AC/'ACT821 is functionally and pin compatible with the AM29821.
Function Table
|
|
|
Inputs |
|
Internal |
Outputs |
Function |
|
|
|
|
|
|
|
|
|
OE |
|
CP |
D |
Q |
O |
|
|
H |
N |
L |
L |
Z |
High Z |
|
|
|
|
|
|
|
|
|
|
H |
N |
H |
H |
Z |
High Z |
|
|
|
|
|
|
|
|
|
|
L |
N |
L |
L |
L |
Load |
|
|
|
|
|
|
|
|
|
|
L |
N |
H |
H |
H |
Load |
|
|
|
|
|
|
|
|
|
H = HIGH Voltage Level
L = LOW Voltage Level
Z = HIGH Impedance
N = LOW-to-HIGH Clock Transition
Logic Diagram
DS100355-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.national.com |
2 |
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (VCC) |
−0.5V to +7.0V |
DC Input Diode Current (IIK) |
|
VI = −0.5V |
−20 mA |
VI = VCC + 0.5V |
+20 mA |
DC Input Voltage (VI) |
−0.5V to V CC + 0.5V |
DC Output Diode Current (IOK) |
|
VO = −0.5V |
−20 mA |
VO = VCC + 0.5V |
+20 mA |
DC Output Voltage (VO) |
−0.5V to V CC + 0.5V |
DC Output Source |
|
or Sink Current (IO) |
±50 mA |
DC VCC or Ground Current |
|
per Output Pin (ICC or IGND) |
±50 mA |
Storage Temperature (TSTG) |
−65ÊC to +150ÊC |
Junction Temperature (TJ) |
|
CDIP |
175ÊC |
Recommended Operating
Conditions
Supply Voltage (VCC) |
|
|
'AC |
|
2.0V to 6.0V |
'ACT |
|
4.5V to 5.5V |
Input Voltage (VI) |
|
0V to VCC |
Output Voltage (VO) |
|
0V to VCC |
Operating Temperature (TA) |
|
|
54AC/ACT |
|
−55ÊC to +125ÊC |
Minimum Input Edge Rate ( |
V/ |
t) |
'AC Devices |
|
|
VIN from 30% to 70% of VCC |
|
|
VCC @ 3.3V, 4.5V, 5.5V |
|
125 mV/ns |
Minimum Input Edge Rate ( |
V/ |
t) |
'ACT Devices |
|
|
VIN from 0.8V to 2.0V |
|
|
VCC @ 4.5V, 5.5V |
|
125 mV/ns |
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT® circuits outside databook specifications.
DC Characteristics for 'AC Family Devices
|
|
|
54AC |
|
|
|
|
|
|
|
|
Symbol |
Parameter |
VCC |
TA = −55ÊC to +125ÊC |
Units |
Conditions |
|
|
(V) |
Guaranteed Limits |
|
|
|
|
|
|
|
|
VIH |
Minimum High Level |
3.0 |
2.1 |
|
VOUT = 0.1V |
|
Input Voltage |
4.5 |
3.15 |
V |
or VCC − 0.1V |
|
|
5.5 |
3.85 |
|
|
|
|
|
|
|
|
VIL |
Maximum Low Level |
3.0 |
0.9 |
|
VOUT = 0.1V |
|
Input Voltage |
4.5 |
1.35 |
V |
or VCC − 0.1V |
|
|
5.5 |
1.65 |
|
|
|
|
|
|
|
|
VOH |
Minimum High Level |
3.0 |
2.9 |
|
IOUT = −50 µA |
|
Output Voltage |
4.5 |
4.4 |
V |
|
|
|
5.5 |
5.4 |
|
|
|
|
|
|
|
(Note 2) |
|
|
|
|
|
VIN = VIL or VIH |
|
|
3.0 |
2.4 |
|
IOH = −12 mA |
|
|
4.5 |
3.7 |
V |
IOH = −24 mA |
|
|
5.5 |
4.7 |
|
IOH = −24 mA |
VOL |
Maximum Low Level |
3.0 |
0.1 |
|
IOUT = 50 µA |
|
Output Voltage |
4.5 |
0.1 |
V |
|
|
|
5.5 |
0.1 |
|
|
|
|
|
|
|
(Note 2) |
|
|
|
|
|
VIN = VIL or VIH |
|
|
3.0 |
0.50 |
|
IOL = 12 mA |
|
|
4.5 |
0.50 |
V |
IOL = 24 mA |
|
|
5.5 |
0.50 |
|
IOL = 24 mA |
IIN |
Maximum Input |
5.5 |
±1.0 |
µA |
VI = VCC, GND |
|
Leakage Current |
|
|
|
|
|
|
|
|
|
|
IOZ |
Maximum TRI-STATE |
|
|
|
VI (OE) = VIL, VIH |
|
Current |
5.5 |
±10.0 |
µA |
VI = VCC, GND |
|
|
|
|
|
VO = VCC, GND |
3 |
www.national.com |