MOTOROLA MC74ACT153DR2, MC74ACT153DT, MC74ACT153DTR2, MC74ACT153M, MC74ACT153MEL Datasheet
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Dual 4 Input Multiplexer
The MC74AC153/74ACT153 is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The two buffered outputs present data in the true (non-inverted) form. In addition to multiplexer operation, the MC74AC153/ 74ACT153 can act as a function generator and generate any two functions of three variables.
•Outputs Source/Sink 24 mA
•′ACT153 Has TTL Compatible Inputs
VCC |
Eb |
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S0 |
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I3b |
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I2b |
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I1b |
I0b |
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Zb |
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PIN NAMES |
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I0a±I3a |
Side A Data Inputs |
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I0b±I3b |
Side B Data Inputs |
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S |
0, S1 |
Common Select Inputs |
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E |
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a |
Side A Enable Input |
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Eb |
Side B Enable Input |
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1 |
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4 |
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Za |
Side A Output |
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Ea |
S1 |
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I3a |
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I2a |
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I1a |
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I0a |
Za |
GND |
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Zb |
Side B Output |
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TRUTH TABLE
MC74AC153
MC74ACT153
DUAL 4-INPUT
MULTIPLEXER
N SUFFIX
CASE 648-08
PLASTIC
D SUFFIX
CASE 751B-05
PLASTIC
Select |
Inputs (a or b) |
Output |
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Inputs |
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LOGIC SYMBOL |
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S0 |
S1 |
E |
I0 |
I1 |
I2 |
I3 |
Z |
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X |
X |
H |
X |
X |
X |
X |
L |
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L |
L |
L |
L |
X |
X |
X |
L |
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L |
L |
L |
H |
X |
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H |
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Ea I0a I1a I2a I3a I0b I1b I2b I3b Eb |
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H |
L |
L |
X |
L |
X |
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L |
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S0 |
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S1 |
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H |
L |
L |
X |
H |
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H |
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Za |
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Zb |
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L |
H |
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X |
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L |
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L |
H |
L |
X |
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H |
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H |
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H |
H |
L |
X |
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L |
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H |
H |
L |
X |
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H |
H |
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H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
FACT DATA
5-1
MC74AC153 MC74ACT153
FUNCTIONAL DESCRIPTION
The MC74AC153/74ACT153 is a dual 4-input multiplexer. It can select two bits of data from up to four sources under the control of the common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active-LOW Enables (Ea,Eb) which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za, Zb) are forced LOW. The
MC74AC153/74ACT153 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two Select inputs. The logic equations for the outputs are shown below.
Za = Ea•(I0a•S1•S0+I1a•S1•S0+I2a•S1•S0+I3a•S1•S0)
Zb = Eb•(I0b•S1•S0+I1b•S1•S0+I2b•S1•S0+I3b•S1•S0)
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LOGIC DIAGRAM |
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Ea I0a |
I1a |
I2a |
I3a |
S1 |
S0 |
I0b |
I1b |
I2b |
I3b Eb |
Za |
Zb |
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
MAXIMUM RATINGS*
Symbol |
Parameter |
Value |
Unit |
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VCC |
DC Supply Voltage (Referenced to GND) |
±0.5 to +7.0 |
V |
Vin |
DC Input Voltage (Referenced to GND) |
±0.5 to VCC +0.5 |
V |
Vout |
DC Output Voltage (Referenced to GND) |
±0.5 to VCC +0.5 |
V |
Iin |
DC Input Current, per Pin |
±20 |
mA |
Iout |
DC Output Sink/Source Current, per Pin |
±50 |
mA |
ICC |
DC VCC or GND Current per Output Pin |
±50 |
mA |
Tstg |
Storage Temperature |
±65 to +150 |
°C |
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.
FACT DATA
5-2
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