Quad 2 Input Multiplexer
The MC74AC157/74ACT157 is a high-speed quad 2-input multiplexer. Four
bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form. The MC74AC157/74ACT157 can also be used as a function generator.
•Outputs Source/Sink 24 mA
•′ACT157 Has TTL Compatible Inputs
VCC |
E |
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I0c |
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I1c |
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Zc |
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I0d |
I1d |
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Zd |
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15 |
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14 |
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13 |
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12 |
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11 |
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10 |
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9 |
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PIN NAMES |
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I0a±I0d |
Source 0 Data Inputs |
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I1a±I1d |
Source 1 Data Inputs |
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E |
Enable Input |
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1 |
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2 |
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3 |
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4 |
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5 |
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6 |
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7 |
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8 |
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S |
Select Input |
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S |
I0a |
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I1a |
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Za |
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I0b |
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I1b |
Zb |
GND |
Za±Zd |
Outputs |
MC74AC157
MC74ACT157
QUAD 2-INPUT
MULTIPLEXER
N SUFFIX
CASE 648-08
PLASTIC
D SUFFIX
CASE 751B-05
PLASTIC
TRUTH TABLE
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Inputs |
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Outputs |
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E |
S |
I0 |
I1 |
Z |
H |
X |
X |
X |
L |
L |
H |
X |
L |
L |
L |
H |
X |
H |
H |
L |
L |
L |
X |
L |
L |
L |
H |
X |
H |
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H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
LOGIC SYMBOL
E I0a I1a I0b I1b I0c I1c I0d I1d
S
Za |
Zb |
Zc |
Zd |
FACT DATA
5-1
MC74AC157 MC74ACT157
FUNCTIONAL DESCRIPTION
The MC74AC157/74ACT157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The MC74AC157/ 74ACT157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below:
Za = E•(I1a•S+I0a•S)
Zb = E•(I1b•S+I0b•S)
Zc = E•(I1c•S+I0c•S)
Zd = E•(I1d•S+I0d•S)
A common use of the MC74AC157/74ACT157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The MC74AC157/ 74ACT157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.
LOGIC DIAGRAM
I0a |
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I1a |
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I0b |
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I1b |
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I0c |
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I1c |
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I0d |
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I1d |
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E |
S |
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Za |
Zb |
Zc |
Zd |
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
MAXIMUM RATINGS*
Symbol |
Parameter |
Value |
Unit |
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VCC |
DC Supply Voltage (Referenced to GND) |
±0.5 to +7.0 |
V |
Vin |
DC Input Voltage (Referenced to GND) |
±0.5 to VCC +0.5 |
V |
Vout |
DC Output Voltage (Referenced to GND) |
±0.5 to VCC +0.5 |
V |
Iin |
DC Input Current, per Pin |
±20 |
mA |
Iout |
DC Output Sink/Source Current, per Pin |
±50 |
mA |
ICC |
DC VCC or GND Current per Output Pin |
±50 |
mA |
Tstg |
Storage Temperature |
±65 to +150 |
°C |
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.
FACT DATA
5-2