Fairchild Semiconductor FDW262P Datasheet

June 2001

FDW262P

20V P-Channel PowerTrench MOSFET

General Description

This P-Channel 1.8V specified MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance.

Applications

•Power management

•Load switch

Features

• –4.5 A, –20 V. RDS(ON)	= 47 mΩ	@ VGS = –4.5 V
RDS(ON)	= 65 mΩ	@ VGS = –2.5 V
RDS(ON)	= 100 mΩ	@ VGS = –1.8 V

•RDS(ON) rated for use with 1.8 V logic

•Low gate charge (13nC typical)

•High performance trench technology for extremely

low RDS(ON)

•Low profile TSSOP-8 package

D

S

5

4

S

D

G

6

3

S

7

2

S

TSSOP-8

D

8

1

Pin 1

Absolute Maximum Ratings

TA=25oC unless otherwise noted

Symbol

Parameter

Ratings

Units

VDSS

Drain–Source Voltage

–20

V

VGSS

Gate-Source Voltage

± 8

V

ID

Drain Current

– Continuous

(Note 1a)

–4.5

A

– Pulsed

–40

PD

Power Dissipation for Single Operation

(Note 1a)

1.3

W

(Note 1b)

0.6

TJ, TSTG

Operating and Storage Junction Temperature Range

–55 to +150

° C

Thermal Characteristics

Rθ JA

Thermal Resistance, Junction-to-Ambient

(Note 1a)

87

° C/W

(Note 1b)

133

° C/W

Package Marking and Ordering Information

Device Marking

Device

Reel Size

Tape width

Quantity

262P

FDW262P

13’’

16mm

3000 units

2001 Fairchild Semiconductor Corporation

FDW262P Rev C(W)

FDW262P

Electrical Characteristics		TA = 25°C unless otherwise noted
Symbol	Parameter	Test Conditions			Min	Typ	Max	Units
Off Characteristics
BVDSS	Drain–Source Breakdown Voltage	VGS = 0 V, ID = –250 µ A			–20			V
∆ BVDSS	Breakdown Voltage Temperature	ID = –250 µ	A, Referenced to 25° C			–14		mV/° C
∆ TJ	Coefficient
IDSS	Zero Gate Voltage Drain Current	VDS = –16 V,		VGS = 0 V			–1	µ A
IGSSF	Gate–Body Leakage, Forward	VGS = 8 V,		VDS = 0 V			100	nA
IGSSR	Gate–Body Leakage, Reverse	VGS = –8 V		VDS = 0 V			–100	nA
On Characteristics (Note 2)
VGS(th)	Gate Threshold Voltage	VDS = VGS, ID = –250 µ A			–0.4	–0.8	–1.5	V
∆ VGS(th)	Gate Threshold Voltage	ID= –250 µ A,				2.5		mV/° C
∆ TJ	Temperature Coefficient	Referenced to 25° C
RDS(on)	Static Drain–Source	VGS = –4.5 V,		ID = –4.5 A		37	47	mΩ
	On–Resistance	VGS = –2.5 V,		ID = –3.7 A		50	65
		VGS = –1.8 V,		ID = –3 A		77	100
		VGS=–4.5 V, ID =–4.5A, TJ=125° C				48	65
ID(on)	On–State Drain Current	VGS = –4.5 V,		VDS = –5 V	–20			A
gFS	Forward Transconductance	VDS = –5 V,		ID = –4.5 A		16		S
Dynamic Characteristics
Ciss	Input Capacitance	VDS = –10 V,		V GS = 0 V,		1193		pF
Coss	Output Capacitance	f = 1.0 MHz				193		pF
Crss	Reverse Transfer Capacitance					96		pF
Switching Characteristics (Note 2)
td(on)	Turn–On Delay Time	VDD = –10 V,		ID = –1 A,		11	20	ns
tr	Turn–On Rise Time	VGS = –4.5 V,		RGEN = 6 Ω		9	18	ns
td(off)	Turn–Off Delay Time					36	57	ns
tf	Turn–Off Fall Time					19	34	ns
Qg	Total Gate Charge	VDS = –10 V,		ID = –4.5 A,		13	18	nC
Qgs	Gate–Source Charge	VGS = –4.5 V				2.5		nC
Qgd	Gate–Drain Charge					3.6		nC
Drain–Source Diode Characteristics and Maximum Ratings
IS	Maximum Continuous Drain–Source Diode Forward Current						–1.1	A
VSD	Drain–Source Diode Forward	VGS = 0 V,	IS = –1.1 A (Note 2)			–0.7	–1.2	V
	Voltage
Notes:

1.Rθ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. Rθ JC is guaranteed by design while Rθ CA is determined by the user's board design.

a)	87°C/W when	b)	133°C/W when mounted
	mounted on a 1in2 pad		on a minimum pad of 2 oz
	of 2 oz copper.		copper.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%

FDW262P Rev C(W)

FDW262P