January 2000
FM27C512
524,288-Bit (64K x 8) High Performance CMOS EPROM
General Description
The FM27C512 is a high performance 512K UV Erasable Electrically Programmable Read Only Memory (EPROM). It is manufactured using Fairchild’s proprietary CMOS AMG™ EPROM technology for an excellent combination of speed and economy while providing excellent reliability.
The FM27C512 provides microprocessor-based systems storage capacity for portions of operating system and application software. Its 90 ns access time provides no wait-state operation with high-performance CPUs. The FM27C512 offers a single chip solution for the code storage requirements of 100% firmwarebased equipment. Frequently-used software routines are quickly executed from EPROM storage, greatly enhancing system utility.
The FM27C512 is configured in the standard JEDEC EPROM pinout which provides an easy upgrade path for systems which are currently using standard EPROMs.
The FM27C512 is one member of a high density EPROM Family which range in densities up to 4 Megabit.
Features
■High performance CMOS
—90 ns access time
■Fast turn-off for microprocessor compatibility
■Manufacturers identification code
■JEDEC standard pin configuration
—28-pin PDIP package
—32-pin chip carrier
—28-pin CERDIP package
Block Diagram
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VCC |
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Data Outputs O0 - O7 |
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GND |
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VPP |
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OE |
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Output Enable and |
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Chip Enable Logic |
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Output |
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CE/PGM |
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Buffers |
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Y Decoder |
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524,288-Bit |
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Cell Matrix |
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A0 - A15 |
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Address |
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Inputs |
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X Decoder |
. . . . . |
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DS800035-1
AMG is a trademark of WSI, Inc.
EPROM CMOS cePerforman High 8) x (64K Bit-524,288 FM27C512
© 1998 Fairchild Semiconductor Corporation |
1 |
www.fairchildsemi.com |
FM27C512
Connection Diagrams
27C040 |
27C010 |
27C256 |
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DIP |
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XX/VPP |
XX/VPP |
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FM27C512 |
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A16 |
A16 |
VPP |
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A15 |
A15 |
A15 |
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1 |
28 |
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VCC |
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A12 |
A12 |
A12 |
A12 |
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2 |
27 |
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A14 |
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A7 |
A7 |
A7 |
A7 |
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3 |
26 |
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A13 |
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A6 |
A6 |
A6 |
A6 |
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4 |
25 |
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A8 |
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A5 |
A5 |
A5 |
A5 |
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5 |
24 |
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A9 |
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A4 |
A4 |
A4 |
A4 |
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23 |
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A11 |
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A3 |
A3 |
A3 |
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22 |
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A3 |
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7 |
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OE/VPP |
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A2 |
A2 |
A2 |
A2 |
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21 |
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A10 |
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A1 |
A1 |
A1 |
A1 |
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20 |
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CE/PGM |
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A0 |
A0 |
A0 |
A0 |
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10 |
19 |
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O7 |
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O0 |
O0 |
O0 |
O0 |
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18 |
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O6 |
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O1 |
O1 |
O1 |
O1 |
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12 |
17 |
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O5 |
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O2 |
O2 |
O2 |
O2 |
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13 |
16 |
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O4 |
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GND |
GND |
GND |
GND |
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14 |
15 |
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O3 |
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Compatible EPROM pin configurations are shown in the blocks adjacement to the FM27C512 pins.
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27C256 |
27C010 |
27C040 |
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VCC |
VCC |
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A18 |
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XX/PGM |
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VCC |
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XX |
A17 |
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A14 |
A14 |
A14 |
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A13 |
A13 |
A13 |
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A8 |
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A8 |
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A8 |
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A9 |
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A9 |
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A9 |
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A11 |
A11 |
A11 |
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OE |
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OE |
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OE |
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A10 |
A10 |
A10 |
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CE/PGM |
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CE |
CE/PGM |
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O7 |
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O7 |
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O7 |
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O6 |
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O6 |
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O6 |
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O5 |
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O5 |
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O5 |
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O4 |
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O4 |
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O4 |
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O3 |
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O3 |
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O3 |
DS800035-2
Commercial Temp Range (0°C to +70°C)
Parameter/Order Number |
Access Time (ns) |
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FM27C512 Q, N, V 90 |
90 |
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FM27C512 Q, N, V 120 |
120 |
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FM27C512 Q, N, V 150 |
150 |
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Industrial Temp Range (-40°C to +85°C)
Parameter/Order Number |
Access Time (ns) |
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FM27C512 QE, NE, VE 120 |
120 |
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FM27C512 QE, NE, VE 150 |
150 |
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Q = Quartz-Windowed Ceramic DIP Package
N = Plastic DIP Package
V = PLCC Package
•All packages conform to the JEDEC standard.
•All versions are guaranteed to function for slower speeds.
Pin Names
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A0–A15 |
Addresses |
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Chip Enable/Program |
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CE/PGM |
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Output Enable |
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OE |
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O0–O7 |
Outputs |
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NC |
Don’t Care (During Read) |
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PLCC
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A7 |
A12 |
A15 |
NC |
VCC |
A14 |
A13 |
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4 |
3 |
2 |
1 |
32 |
31 |
30 |
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A6 |
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A8 |
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A5 |
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28 |
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A9 |
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A4 |
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27 |
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A11 |
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A3 |
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26 |
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NC |
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A2 |
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9 |
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25 |
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OE/VPP |
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A1 |
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A10 |
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A0 |
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CE/PGM |
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22 |
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O7 |
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O0 |
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21 |
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O8 |
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O1 |
O2 |
GND |
NC |
O3 |
O4 |
O5 |
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DS800035-3
EPROM CMOS cePerforman High 8) x (64K Bit-524,288 FM27C512
2 |
www.fairchildsemi.com |
FM27C512
Absolute Maximum Ratings (Note 1)
Storage Temperature |
-65°C to +150°C |
All Input Voltages Except A9 with |
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Respect to Ground |
-0.6V to +7V |
VPP and A9 with Respect to Ground |
-0.7V to +14V |
VCC Supply Voltage with |
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Respect to Ground |
-0.6V to +7V |
ESD Protection |
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(MIL Std. 883, Method 3015.2) |
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>2000V |
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All Output Voltages with |
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Respect to Ground |
VCC + 1.0V to GND -0.6V |
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Operating Range |
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Range |
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Temperature |
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VCC |
Tolerance |
Commercial |
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0°C to +70°C |
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+5V |
±10% |
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Industrial |
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-40°C to +85°C |
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+5V |
±10% |
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Read Operation
DC Electrical Characteristics
Symbol |
Parameter |
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Test Conditions |
Min |
Max |
Units |
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VIL |
Input Low Level |
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-0.5 |
0.8 |
V |
VIH |
Input High Level |
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2.0 |
VCC +1 |
V |
VOL |
Output Low Voltage |
IOL = 2.1 mA |
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0.4 |
V |
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VOH |
Output High Voltage |
IOH = -2.5 mA |
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3.5 |
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V |
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ISB1 |
VCC Standby Current (CMOS) |
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= VCC ±0.3V |
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100 |
A |
CE |
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ISB2 |
VCC Standby Current |
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= VIH |
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1 |
mA |
CE |
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ICC1 |
VCC Active Current |
CE = OE = VIL |
f = 5 MHz |
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40 |
mA |
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ICC2 |
VCC Active Current |
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CE |
= GND, f = 5 MHz |
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CMOS Inputs |
Inputs = VCC or GND, I/O = 0 mA |
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35 |
mA |
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C, E Temp Ranges |
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IPP |
VPP Supply Current |
VPP = VCC |
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10 |
A |
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VPP |
VPP Read Voltage |
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VCC - 0.7 |
VCC |
V |
ILI |
Input Load Current |
VIN = 5.5V or GND |
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-1 |
1 |
A |
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ILO |
Output Leakage Current |
VOUT = 5.5V or GND |
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-10 |
10 |
A |
AC Electrical Characteristics
Symbol |
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Parameter |
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90 |
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120 |
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150 |
Units |
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Min |
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Max |
Min |
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Max |
Min |
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Max |
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tACC |
Address to Output Delay |
|
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90 |
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120 |
|
|
150 |
ns |
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tCE |
|
CE |
|
to Output Delay |
|
|
90 |
|
|
120 |
|
|
150 |
|
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tOE |
|
|
to Output Delay |
|
|
40 |
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|
50 |
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|
50 |
|
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OE |
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tDF |
Output Disable to |
|
|
35 |
|
|
25 |
|
|
45 |
|
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|
Output Float |
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tOH |
Output Hold from Addresses, |
|
or |
|
|
0 |
|
|
0 |
|
|
0 |
|
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CE |
OE, |
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|
Whichever Occurred First |
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EPROM CMOS cePerforman High 8) x (64K Bit-524,288 FM27C512
3 |
www.fairchildsemi.com |
FM27C512