FQD9N08L / FQU9N08L
80V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and commutation modes. These devices are well suited for low voltage applications such as automotive, high efficiency switching for DC/DC converters, and DC motor control.
December 2000
QFETTM
Features
• 7.4A, 80V, RDS(on) = 0.21Ω @VGS = 10 V
•Low gate charge ( typical 4.7 nC)
•Low Crss ( typical 16 pF)
•Fast switching
•100% avalanche tested
•Improved dv/dt capability
•175° C maximum junction temperature rating
•Low level gate drive requirements allowing direct operation from logic drives
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D-PAK |
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I-PAK |
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FQD Series |
G D S |
FQU Series |
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Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol |
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Parameter |
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FQD9N08L / FQU9N08L |
Units |
VDSS |
Drain-Source Voltage |
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80 |
V |
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ID |
Drain Current |
- Continuous (TC = 25°C) |
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7.4 |
A |
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- Continuous (TC = 100°C) |
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4.68 |
A |
IDM |
Drain Current |
- Pulsed |
(Note 1) |
29.6 |
A |
VGSS |
Gate-Source Voltage |
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± 20 |
V |
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EAS |
Single Pulsed Avalanche Energy |
(Note 2) |
55 |
mJ |
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IAR |
Avalanche Current |
(Note 1) |
7.4 |
A |
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EAR |
Repetitive Avalanche Energy |
(Note 1) |
2.5 |
mJ |
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dv/dt |
Peak Diode Recovery dv/dt |
(Note 3) |
6.5 |
V/ns |
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PD |
Power Dissipation (TA = 25°C) * |
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2.5 |
W |
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Power Dissipation (TC = 25°C) |
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25 |
W |
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- Derate above 25°C |
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0.2 |
W/°C |
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TJ, TSTG |
Operating and Storage Temperature Range |
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-55 to +150 |
°C |
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TL |
Maximum lead temperature for soldering purposes, |
300 |
°C |
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1/8” from case for 5 seconds |
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Thermal Characteristics
Symbol |
Parameter |
Typ |
Max |
Units |
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Rθ JC |
Thermal Resistance, Junction-to-Case |
-- |
5.0 |
°C/W |
Rθ JA |
Thermal Resistance, Junction-to-Ambient * |
-- |
50 |
°C/W |
Rθ JA |
Thermal Resistance, Junction-to-Ambient |
-- |
110 |
°C/W |
* When mounted on the minimum pad size recommended (PCB Mount)
FQU9N08L / FQD9N08L
©2000 Fairchild Semiconductor International |
Rev. A2, December 2000 |
Electrical Characteristics TC = 25°C unless otherwise noted |
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Symbol |
Parameter |
Test Conditions |
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Min |
Typ |
Max |
Units |
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Off Characteristics |
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BVDSS |
Drain-Source Breakdown Voltage |
VGS = 0 V, ID = 250 µ A |
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80 |
-- |
-- |
V |
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∆ |
BVDSS |
Breakdown Voltage Temperature |
ID = 250 µ A, Referenced to 25°C |
-- |
0.08 |
-- |
V/°C |
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∆ TJ |
Coefficient |
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IDSS |
Zero Gate Voltage Drain Current |
VDS = 80 V, VGS = 0 V |
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-- |
-- |
1 |
µ |
A |
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VDS = 64 V, TC = 125°C |
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-- |
-- |
10 |
µ |
A |
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IGSSF |
Gate-Body Leakage Current, Forward |
VGS = 20 V, VDS = 0 V |
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-- |
-- |
100 |
nA |
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IGSSR |
Gate-Body Leakage Current, Reverse |
VGS = -20 V, VDS = 0 V |
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-- |
-- |
-100 |
nA |
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On Characteristics |
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VGS(th) |
Gate Threshold Voltage |
VDS = VGS, ID = 250 µ A |
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1.0 |
-- |
2.0 |
V |
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RDS(on) |
Static Drain-Source |
VGS = 10 V, ID = 3.7 A |
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-- |
0.15 |
0.21 |
Ω |
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On-Resistance |
VGS = 5 V, ID = 3.7 A |
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0.17 |
0.23 |
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gFS |
Forward Transconductance |
VDS = 25 V, ID = 3.7 A |
(Note 4) |
-- |
4.8 |
-- |
S |
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Dynamic Characteristics |
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Ciss |
Input Capacitance |
VDS = 25 V, VGS = 0 V, |
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-- |
215 |
280 |
pF |
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Coss |
Output Capacitance |
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-- |
70 |
90 |
pF |
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f = 1.0 MHz |
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Crss |
Reverse Transfer Capacitance |
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-- |
16 |
20 |
pF |
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Switching Characteristics |
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td(on) |
Turn-On Delay Time |
VDD = 40 V, ID = 9.3 A, |
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-- |
6.5 |
23 |
ns |
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tr |
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Turn-On Rise Time |
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-- |
180 |
370 |
ns |
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RG = 25 Ω |
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td(off) |
Turn-Off Delay Time |
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-- |
13 |
35 |
ns |
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tf |
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Turn-Off Fall Time |
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(Note 4, 5) |
-- |
30 |
70 |
ns |
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Qg |
Total Gate Charge |
VDS = 64 V, ID = 9.3 A, |
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-- |
4.7 |
6.1 |
nC |
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Qgs |
Gate-Source Charge |
VGS = 5 V |
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-- |
1.2 |
-- |
nC |
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Qgd |
Gate-Drain Charge |
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(Note 4, 5) |
-- |
2.8 |
-- |
nC |
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Drain-Source Diode Characteristics and Maximum Ratings |
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IS |
Maximum Continuous Drain-Source Diode Forward Current |
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-- |
-- |
7.4 |
A |
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ISM |
Maximum Pulsed Drain-Source Diode Forward Current |
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-- |
-- |
29.6 |
A |
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VSD |
Drain-Source Diode Forward Voltage |
VGS = 0 V, IS = 7.4 A |
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-- |
-- |
1.5 |
V |
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trr |
Reverse Recovery Time |
VGS = 0 V, IS = 9.3 A, |
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-- |
54 |
-- |
ns |
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Qrr |
Reverse Recovery Charge |
dIF / dt = 100 A/µ s |
(Note 4) |
-- |
80 |
-- |
nC |
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Notes: |
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1. |
Repetitive Rating : Pulse width limited by maximum junction temperature |
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2. |
L = 1.38mH, IAS = 7.4A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C |
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3. |
ISD ≤ 9.3A, di/dt ≤ 300A/µ |
s, VDD ≤ BVDSS, Starting TJ = 25°C |
4. |
Pulse Test : Pulse width ≤ |
300µ s, Duty cycle ≤ 2% |
5. |
Essentially independent of operating temperature |
FQU9N08L / FQD9N08L
©2000 Fairchild Semiconductor International |
Rev. A2, December 2000 |
Typical Characteristics
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VGS |
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Top : |
10.0 V |
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8.0 V |
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101 |
6.0 V |
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5.0 V |
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4.5 V |
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[A] |
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4.0 V |
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3.5 V |
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Bottom : |
3.0 V |
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Current |
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100 |
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, Drain |
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Notes : |
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1. 250μs Pulse Test |
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2. TC = 25 |
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10-1 |
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10-1 |
100 |
101 |
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
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0.8 |
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0.6 |
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Ω],[ |
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VGS = 5V |
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DS(on) ResistanceOn- |
0.4 |
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R |
DrainSource- |
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VGS = 10V |
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0.2 |
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Note : TJ = 25 |
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0.0 |
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0 |
5 |
10 |
15 |
20 |
25 |
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ID , Drain Current |
[A] |
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Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
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600 |
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Ciss = Cgs + Cgd (Cds = shorted) |
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Coss = Cds + Cgd |
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500 |
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Crss = Cgd |
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400 |
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[pF] |
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Notes : |
Capacitance |
300 |
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Ciss |
1. VGS = 0 V |
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2. f = 1 MHz |
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200 |
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Coss |
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100 |
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Crss |
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0 |
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10-1 |
100 |
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101 |
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
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101 |
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/ FQD9N08L |
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FQU9N08L |
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Notes : |
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[A] |
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Current |
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150 |
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Drain, |
100 |
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25 |
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-55 |
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1. VDS = 25V |
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2. 250μs Pulse Test |
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10-1 |
0 |
2 |
4 |
6 |
8 |
10 |
VGS , Gate-Source Voltage [V]
Figure 2. Transfer Characteristics
[A] |
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1 |
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Drain Current |
10 |
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Reverse, |
100 |
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DR |
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150 |
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25 |
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Notes : |
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1. VGS = 0V |
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2. 250μs Pulse Test |
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-1 |
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10 |
0.2 |
0.4 |
0.6 |
0.8 |
1.0 |
1.2 |
1.4 |
1.6 |
VSD , Source-Drain Voltage [V]
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
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12 |
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10 |
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[V] |
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VDS = 40V |
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8 |
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Voltage |
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VDS |
= 64V |
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Gate-Source |
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GS |
2 |
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V |
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Note : ID = 9.3A |
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0 |
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7 |
8 |
9 |
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0 |
1 |
2 |
3 |
4 |
5 |
6 |
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QG, Total Gate Charge [nC] |
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Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International |
Rev. A2, December 2000 |