Fairchild Semiconductor FDR844P Datasheet

October 2001

FDR844P

P-Channel 1.8V Specified PowerTrench MOSFET

General Description

This P-Channel 1.8V specified MOSFET uses Fairchild’s advanced low voltage PowerTrench process. It has been optimized for battery power management applications.

Applications

•Power management

•Load switch

•Battery protection

Features

• –10 A, –20 V. RDS(ON) = 11 mΩ	@ VGS = –4.5 V
RDS(ON) = 14 mΩ	@ VGS = –2.5 V
RDS(ON) = 20 mΩ	@VGS = –1.8 V

•Fast switching speed

•High performance trench technology for extremely

low RDS(ON)

•High power and current handling capability

D D	S
			5	4
S			6	3
		D D G	7	2
TM	-8		8	1
SuperSOT		D

Absolute Maximum Ratings TA=25oC unless otherwise noted

Symbol	Parameter		Ratings	Units
VDSS	Drain-Source Voltage		–20	V
VGSS	Gate-Source Voltage		± 8	V
ID	Drain Current – Continuous	(Note 1a)	–10	A
	– Pulsed		–50
PD	Power Dissipation for Single Operation	(Note 1a)	1.8	W
		(Note 1b)	1.0
		(Note 1c)	0.9
TJ, TSTG	Operating and Storage Junction Temperature Range		-55 to +150	° C

Thermal Characteristics

Rθ JA	Thermal Resistance, Junction-to-Ambient	(Note 1a)	70	° C/W
Rθ JC	Thermal Resistance, Junction-to-Case	(Note 1)	20	° C/W

Package Marking and Ordering Information

	Device Marking		Device	Reel Size	Tape width	Quantity
	.844P		FDR844P	13’’	12mm	2500 units
	2001 Fairchild Semiconductor Corporation					FDR844P Rev A1(W)

FDR844P

Electrical Characteristics		TA = 25°C unless otherwise noted
Symbol	Parameter	Test Conditions			Min	Typ	Max	Units
Off Characteristics
BVDSS	Drain–Source Breakdown Voltage	VGS = 0 V, ID = –250 µ A			–20			V
∆ BVDSS	Breakdown Voltage Temperature	ID = –250 µ A, Referenced to 25° C				–13		mV/° C
∆ TJ	Coefficient
IDSS	Zero Gate Voltage Drain Current	VDS = –16V,	VGS = 0 V				–1	µ A
IGSSF	Gate–Body Leakage, Forward	VGS = 8 V,	VDS = 0 V				100	nA
IGSSR	Gate–Body Leakage, Reverse	VGS = –8 V,	VDS = 0 V				–100	nA
On Characteristics (Note 2)
VGS(th)	Gate Threshold Voltage	VDS = VGS, ID = –250 µ A			–0.4	–0.7	–1.5	V
∆ VGS(th)	Gate Threshold Voltage	ID = –250 µ A, Referenced to 25° C				3		mV/° C
∆ TJ	Temperature Coefficient
RDS(on)	Static Drain–Source	VGS = –4.5 V,	ID = –10 A			7	11	mΩ
	On–Resistance	VGS = –2.5 V,	ID = –9 A			9.5	14
		VGS = –1.8 V,	ID = –7.5 A			13	20
		VGS= –4.5 V, ID = –10 A, TJ=125° C				9.5	15
ID(on)	On–State Drain Current	VGS = –4.5 V,	VDS = –5 V		–50			A
gFS	Forward Transconductance	VDS = –10 V,	ID = –10 A			57		S
Dynamic Characteristics
Ciss	Input Capacitance	VDS = –10 V,	V GS = 0 V,			4951		pF
Coss	Output Capacitance	f = 1.0 MHz				884		pF
Crss	Reverse Transfer Capacitance					451		pF
Switching Characteristics (Note 2)
td(on)	Turn–On Delay Time	VDD = –10 V,	ID = –1 A,			16	29	ns
tr	Turn–On Rise Time	VGS = –4.5 V,	RGEN = 6 Ω			9	18	ns
td(off)	Turn–Off Delay Time					196	314	ns
tf	Turn–Off Fall Time					78	125	ns
Qg	Total Gate Charge	VDS = –10 V,	ID = –10 A,			53	74	nC
Qgs	Gate–Source Charge	VGS = –4.5 V				6		nC
Qgd	Gate–Drain Charge					12		nC
Drain–Source Diode Characteristics and Maximum Ratings
IS	Maximum Continuous Drain–Source Diode Forward Current						–1.5	A
VSD	Drain–Source Diode Forward	VGS = 0 V,	IS = –1.5 A	(Note 2)		–0.56	–1.2	V
	Voltage

Notes:

1.Rθ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. Rθ JC is guaranteed by design while Rθ CA is determined by the user's board design.

a) 70°C/W when	b) 125°C/W when	c) 135°C/W when mounted on a
mounted on a 1in2	mounted on a .04 in2	minimum pad.
pad of 2 oz copper	pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%

FDR844P

FDR844P Rev A1(W)