SGS Thomson Microelectronics M93C86-W, M93C86-MN3, M93C86-BN6, M93C86-BN3, M93C86 Datasheet

M93C86, M93C76, M93C66

M93C56, M93C46, M93C06

16K/8K/4K/2K/1K/256 (x8/x16) Serial Microwire Bus EEPROM

INDUSTRY STANDARD MICROWIRE BUS

1 MILLION ERASE/WRITE CYCLES, with 40 YEARS DATA RETENTION

DUAL ORGANIZATION: by WORD (x16) or by BYTE (x8)

BYTE/WORD and ENTIRE MEMORY

PROGRAMMING INSTRUCTIONS

SELF-TIMED PROGRAMMING CYCLE with AUTO-ERASE

READY/BUSY SIGNAL DURING PROGRAMMING

SINGLE SUPPLY VOLTAGE:

–4.5V to 5.5V for M93Cx6 version

–2.5V to 5.5V for M93Cx6-W version

–1.8V to 3.6V for M93Cx6-R version

SEQUENTIAL READ OPERATION

5ms TYPICAL PROGRAMMING TIME

ENHANCED ESD/LATCH-UP PERFORMANCES

DESCRIPTION

This M93C86/C76/C66/C56/C46/C06 specification covers a range of 16K/8K/4K/2K/1K/256 bit serial EEPROM products respectively. In this text, products are referred to as M93Cx6. The M93Cx6 is an Electrically Erasable Programmable Memory (EEPROM) fabricated with STMicroelectronics’s High Endurance Single Polysilicon CMOS technology. The M93Cx6 memory is accessed through a serial input (D) and output (Q) using the MICROWIRE bus protocol.

Table 1. Signal Names

S	Chip Select Input
D	Serial Data Input
Q	Serial Data Output
C	Serial Clock
ORG	Organisation Select
VCC	Supply Voltage
VSS	Ground

8	8
1	1
PSDIP8 (BN)	SO8 (MN)
0.25mm Frame	150mil Width

8

1

TSSOP8 (DW)

169mil Width

Figure 1. Logic Diagram

VCC

D				Q

C

M93Cx6

S

ORG

VSS

AI01928

February 1999

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M93C86, M93C76, M93C66, M93C56, M93C46, M93C06

Figure 2A. DIP and SO Pin Connections				Figure 2B. SO 90° Turn Pin Connections
	M93Cx6					M93Cx6
		8
S	1		VCC		DU	1	8	ORG
C	2	7	DU		VCC	2	7	VSS
D	3	6	ORG		S	3	6	Q
Q	4	5	VSS		C	4	5	D
		AI01929B					AI00900
Warning: DU = Don’t Use				Warning: DU = Don’t Use

Figure 2C. TSSOP Pin Connections

M93C06/46/56/66 - W

M93C06/46/56/66 - R

S	1	8	VCC
C	2	7	DU
D	3	6	ORG
Q	4	5	VSS
		AI02789

Warning: DU = Don’t Use

DESCRIPTION (cont’d)

The M93Cx6 specified at 5V±10%, the M93Cx6-W specified at 2.5V to 5.5V and the M93Cx6-R specified at 1.8V to 3.6V.

The M93Cx6 memory array organization may be divided into either bytes (x8) or words (x16) which may be selected by a signal applied on the ORG input. The M93C86/C76/C66/C56/C46/C06 is divided into either 2048/1024/512/256/128/32 x8 bit bytes or 1024/512/256/128/64/16 x16 bit words respectively. These memory devices are available in both PSDIP8, SO8 and TSSOP8 packages.

The M93Cx6 memory is accessed by a set of instructions which includes Read a Byte/Word, Write a Byte/Word, Erase a Byte/Word, Erase All and Write All. A Read instruction loads the address of the first byte/word to be read into an internal address pointer. The data contained at this address is then clocked out serially. The address pointer is automatically incremented after the data is output and, if the Chip Select input (S) is held High, the M93Cx6 can output a sequential stream of data bytes/words. In this way, the memory can be read

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as a data stream from 8 up to 16,384 bits long (for the M93C86 only), or continuously as the address counter automatically rolls over to ’00’ when the highest address is reached.

Programming is internally self-timed (the external clock signal on C input may be disconnected or left running after the start of a Write cycle) and does not require an erase cycle prior to the Write instruction. The Write instruction writes 8 or 16 bits at one time into one of the byte or word locations of the M93Cx6. After the start of the programming cycle, a Busy/Ready signal is available on the Data output

(Q) when Chip Select (S) is driven High.

An internal feature of the M93Cx6 provides Poweron Data Protection by inhibiting any operation when the Supply is too low for reliable operation. The design of the M93Cx6 and the High Endurance CMOS technology used for its fabrication give an Erase/Write cycle Endurance of 1,000,000 cycles and a data retention of 40 years.

The DU (Don’t Use) pin does not affect the function of the memory. It is reserved for use by STMicroelectronics during test sequences. The pin may be left unconnected or may be connected to VCC or VSS. Direct connection of DU to VSS is recommended for the lowest standby power consumption.

MEMORY ORGANIZATION

The M93Cx6 is organised in either bytes (x8) or words (x16). If the ORG input is left unconnected (or connected to VCC) the x16 organization is selected; when ORG is connected to Ground (VSS) the x8 organization is selected. When the M93Cx6 is in standby mode, the ORG input should be set to either VSS or VCC in order to achieve minimum power consumption. Any voltage between VSS and VCC applied to the ORG input pin may increase the standby current value.

M93C86, M93C76, M93C66, M93C56, M93C46, M93C06

Table 2. Absolute Maximum Ratings (1)

Symbol		Parameter		Value	Unit
TA	Ambient Operating Temperature			–40 to 125	°C
TSTG	Storage Temperature			–65 to 150	°C
TLEAD	Lead Temperature, Soldering	(SO8 package)	40 sec	215	°C
		(PSDIP8 package)	10 sec	260
VIO	Input or Output Voltages (Q = VOH or Hi-Z)			–0.3 to VCC +0.5	V
VCC	Supply Voltage			–0.3 to 6.5	V
VESD	Electrostatic Discharge Voltage (Human Body model) (2)			4000	V
	Electrostatic Discharge Voltage (Machine model) (3)			500	V

Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum

Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

2.MIL-STD-883C, 3015.7 (100pF, 1500 Ω).

3.EIAJ IC-121 (Condition C) (200pF, 0 Ω).

Table 3. AC Measurement Conditions

Input Rise and Fall Times	≤ 50ns
Input Pulse Voltages (M93Cxx)	0.4V to 2.4V
Input Pulse Voltages (M93Cxx-W, M93Cxx-R)	0.2VCC to 0.8VCC
Input Timing Reference Voltages (M93Cxx)	1.0V to 2.0V
Output Timing Reference Voltages (M93Cxx)	0.8V to 2.0V
Input and Output Timing Reference Voltages (M93Cxx-W, M93Cxx-R)	0.3VCC to 0.7VCC
Output Load	CL = 100pF

Note that Output Hi-Z is defined as the point where data is no longer driven.

POWER-ON DATA PROTECTION

In order to prevent data corruption and inadvertent write operations during power-up, a Power On Reset (POR) circuit resets all internal programming circuitry and sets the device in the Write Disable mode.

–At Power-up and Power-down, the device must NOT be selected (that is, the S input must be driven low) until the supply voltage reaches the operating value VCC specified in the AC and DC tables.

–When VCC reaches its functional value, the device is properly reset (in the Write Disable mode) and is ready to decode and execute an incoming instruction.

For the M93Cx6 specified at 5V, the POR threshold voltage is around 3V. For all the other M93Cx6 specified at low VCC (with -W and -R VCC range options), the POR threshold voltage is around 1.5V.

Figure 3. AC Testing Input Output Waveforms

			M93CXX
2.4V		2V		2.0V
0.4V		1V		0.8V
INPUT			OUTPUT
M93CXX-W & M93CXX-R
0.8VCC				0.7VCC
0.2VCC				0.3VCC
				AI02553

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M93C86, M93C76, M93C66, M93C56, M93C46, M93C06

Table 4. Capacitance (1)

(TA = 25 °C, f = 1 MHz )

Symbol	Parameter	Test Condition	Min	Max	Unit
CIN	Input Capacitance	VIN = 0V		5	pF
COUT	Output Capacitance	VOUT = 0V		5	pF

Note: 1. Sampled only, not 100% tested.

Table 5A. DC Characteristics for M93CXX

(TA = 0 to 70°C or –40 to 85°C; VCC = 4.5V to 5.5V)

Symbol	Parameter	Test Condition	Min	Max	Unit
ILI	Input Leakage Current	0V ≤ VIN ≤ VCC		±2.5	μA
ILO	Output Leakage Current	0V ≤ VOUT ≤ VCC, Q in Hi-Z		±2.5	μA
ICC	Supply Current	VCC = 5V, S = VIH, f = 1 MHz		1.5	mA
ICC1	Supply Current (Standby)	VCC = 5V, S = VSS, C = VSS,		50	μA
		ORG = VSS or VCC
VIL	Input Low Voltage (D, C, S)	VCC = 5V ± 10%	–0.3	0.8	V
VIH	Input High Voltage (D, C, S)	VCC = 5V ± 10%	2	VCC + 1	V
VOL	Output Low Voltage (Q)	VCC = 5V, IOL = 2.1mA		0.4	V
VOH	Output High Voltage (Q)	VCC = 5V, IOH = –400μA	2.4		V

Table 5B. DC Characteristics for M93CXX

(TA = –40 to 125°C; VCC = 4.5V to 5.5V)

Symbol	Parameter	Test Condition	Min	Max	Unit
ILI	Input Leakage Current	0V ≤ VIN ≤ VCC		±2.5	μA
ILO	Output Leakage Current	0V ≤ VOUT ≤ VCC, Q in Hi-Z		±2.5	μA
ICC	Supply Current	VCC = 5V, S = VIH, f = 1 MHz		1.5	mA
ICC1	Supply Current (Standby)	VCC = 5V, S = VSS, C = VSS,		50	μA
		ORG = VSS or VCC
VIL	Input Low Voltage (D, C, S)	VCC = 5V ± 10%	–0.3	0.8	V
VIH	Input High Voltage (D, C, S)	VCC = 5V ± 10%	2	VCC + 1	V
VOL	Output Low Voltage (Q)	VCC = 5V, IOL = 2.1mA		0.4	V
VOH	Output High Voltage (Q)	VCC = 5V, IOH = –400μA	2.4		V

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M93C86, M93C76, M93C66, M93C56, M93C46, M93C06

Table 5C. DC Characteristics for M93CXX-W

(TA = 0 to 70°C or –40 to 85°C; VCC = 2.5V to 5.5V)

Symbol	Parameter	Test Condition	Min	Max	Unit
ILI	Input Leakage Current	0V ≤ VIN ≤ VCC		±2.5	μA
ILO	Output Leakage Current	0V ≤ VOUT ≤ VCC, Q in Hi-Z		±2.5	μA
ICC	Supply Current (CMOS Inputs)	VCC = 5V, S = VIH, f = 1 MHz		1.5	mA
		VCC = 2.5V, S = VIH, f = 1 MHz		1	mA
ICC1	Supply Current (Standby)	VCC = 2.5V, S = VSS, C = VSS,		10	μA
		ORG = VSS or VCC
VIL	Input Low Voltage (D, C, S)		–0.3	0.2 VCC	V
VIH	Input High Voltage (D, C, S)		0.7 VCC	VCC + 1	V
VOL	Output Low Voltage (Q)	VCC = 5V, IOL = 2.1mA		0.4	V
		VCC = 2.5V, IOL = 100μA		0.2	V
VOH	Output High Voltage (Q)	VCC = 5V, IOH = –400μA	2.4		V
		VCC = 2.5V, IOH = –100μA	VCC – 0.2		V

Table 5D. DC Characteristics for M93CXX-R (1)

(TA = 0 to 70°C or –20 to 85°C; VCC = 1.8V to 3.6V)

Symbol	Parameter	Test Condition	Min	Max	Unit
ILI	Input Leakage Current	0V ≤ VIN ≤ VCC		±2.5	μA
ILO	Output Leakage Current	0V ≤ VOUT ≤ VCC, Q in Hi-Z		±2.5	μA
ICC	Supply Current (CMOS Inputs)	VCC = 3.6V, S = VIH, f = 1 MHz		1.5	mA
		VCC = 1.8V, S = VIH, f = 1 MHz		1	mA
ICC1	Supply Current (Standby)	VCC = 1.8V, S = VSS, C = VSS,		5	μA
		ORG = VSS or VCC
VIL	Input Low Voltage (D, C, S)		–0.3	0.2 VCC	V
VIH	Input High Voltage (D, C, S)		0.8 VCC	VCC + 1	V
VOL	Output Low Voltage (Q)	VCC = 1.8V, IOL = 100μA		0.2	V
VOH	Output High Voltage (Q)	VCC = 1.8V, IOH = –100μA	VCC – 0.2		V

Note: 1. This is preliminary data.

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M93C86, M93C76, M93C66, M93C56, M93C46, M93C06

Table 6A. AC Characteristics

					M93C86/76/66/56/46/06
	Symbol	Alt	Parameter	VCC = 4.5V to 5.5V,			VCC = 4.5V to 5.5V,			Unit
				TA = 0 to 70°C,
							TA = –40 to 125 °C
				TA = –40 to 85 °C
				Min		Max	Min		Max
			Chip Select Set-up Time	50			50			ns
			M93C06, M39C46, M93C56, M93C66
	tSHCH	tCSS
			Chip Select Set-up time	100			100			ns
			M93C76, M93C86
	tCLSH	tSKS	Clock Set-up Time (relative to S)	100			100			ns
	tDVCH	tDIS	Data In Set-up Time	100			100			ns
	tCHDX	tDIH	Data In Hold Time	100			100			ns
	tCHQL	tPD0	Delay to Output Low			400			400	ns
	tCHQV	tPD1	Delay to Output Valid			400			400	ns
	tCLSL	tCSH	Chip Select Hold Time	0			0			ns
	tSLCH		Chip Select Low to Clock High	250			250			ns
	(1)	tCS	Chip Select Low to Chip Select High	250			250			ns
	tSLSH
	tSHQV	tSV	Chip Select to Ready/Busy Status			400			400	ns
	tSLQZ	tDF	Chip Select Low to Output Hi-Z			200			200	ns
	(2)	tSKH	Clock High Time	250			250			ns
	tCHCL
	(2)	tSKL	Clock Low Time	250			250			ns
	tCLCH
	tW	tWP	Erase/Write Cycle time			10			10	ms
	fC	fSK	Clock Frequency	0		1	0		1	MHz

Notes: 1. Chip Select must be brought low for a minimum of tSLSH between consecutive instruction cycles.

2.The Clock frequency specification calls for a minimum clock period of 1/fC, therefore the sum of the timings tCHCL + tCLCH must be greater or equal to 1/fC.

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