M27512
NMOS 512 Kbit (64Kb x 8) UV EPROM
■FAST ACCESS TIME: 200ns
■EXTENDED TEMPERATURE RANGE
■SINGLE 5V SUPPLY VOLTAGE
■LOW STANDBY CURRENT: 40mA max
■TTL COMPATIBLE DURING READ and PROGRAM
■FAST PROGRAMMING ALGORITHM
■ELECTRONIC SIGNATURE
■PROGRAMMING VOLTAGE: 12V
DESCRIPTION
The M27512 is a 524,288 bit UV erasable and electrically programmable memory EPROM. It is organized as 65,536 words by 8 bits.
The M27512 is housed in a 28 Pin Window Ceramic Frit-Seal Dual-in-Line package. The transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.
NOT FOR NEW DESIGN
28
1
FDIP28W (F)
Figure 1. Logic Diagram
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VCC |
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16 |
8 |
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A0-A15 |
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Q0-Q7 |
E M27512
GVPP
VSS
AI00765B
November 2000 |
1/11 |
This is information on a product still in production but not recommended for new designs.
M27512
Table 2. Absolute Maximum Ratings
Symbol |
Parameter |
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Value |
Unit |
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TA |
Ambient Operating Temperature |
Grade 1 |
0 to 70 |
°C |
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Grade 6 |
–40 to 85 |
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TBIAS |
Temperature Under Bias |
Grade 1 |
–10 to 80 |
°C |
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Grade 6 |
–50 to 95 |
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TSTG |
Storage Temperature |
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–65 to 125 |
°C |
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VIO |
Input or Output Voltages |
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–0.6 to 6.5 |
V |
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VCC |
Supply Voltage |
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–0.6 to 6.5 |
V |
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VA9 |
A9 Voltage |
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–0.6 to 13.5 |
V |
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VPP |
Program Supply |
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–0.6 to 14 |
V |
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Note: Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.
Figure 2. DIP Pin Connections
A15 |
1 |
28 |
VCC |
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A12 |
2 |
27 |
A14 |
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A7 |
3 |
26 |
A13 |
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A6 |
4 |
25 |
A8 |
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A5 |
5 |
24 |
A9 |
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A4 |
6 |
23 |
A11 |
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A3 |
7 |
22 |
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GVPP |
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A2 |
8 |
M27512 |
A10 |
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21 |
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A1 |
9 |
20 |
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E |
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A0 |
10 |
19 |
Q7 |
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Q0 |
11 |
18 |
Q6 |
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Q1 |
12 |
17 |
Q5 |
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Q2 |
13 |
16 |
Q4 |
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VSS |
14 |
15 |
Q3 |
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AI00766 |
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DEVICE OPERATION
The six modes of operations of the M27512 are listed in the Operating Modes table. A single 5V power supply is required in the read mode. All inputs are TTL levels except for GVPP and 12V on A9 for Electronic Signature.
Read Mode
The M27512 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the outputs after delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least
tAVQV-tGLQV.
Standby Mode
The M27512 has a standby mode which reduces the maximum active power current from 125mA to 40mA. The M27512 is placed in the standby mode by applying a TTL high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the GVPP input.
Two Line Output Control
Because EPROMs are usually used in larger memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows :
a.the lowest possible memory power dissipation,
b.complete assurance that output bus contention will not occur.
2/11
M27512
DEVICE OPERATION (cont’d)
For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while GVPP should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.
System Considerations
The power switching characteristics of fast EPROMs require careful decoupling of the devices.
The supply current, ICC, has three segments that are of interest to the system designer : the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommenced that a 1μF ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7μF bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The
Table 3. Operating Modes
bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.
Programming
When delivered, and after each erasure, all bits of the M27512 are in the “1" state. Data is introduced by selectively programming ”0s" into the desired bit locations. Although only “0s” will be programmed, both “1s” and “0s” can be present in the data word. The only way to change a “0" to a ”1" is by ultraviolet light erasure. The M27512 is in the programming mode when GVPP input is at 12.5V and E is at TTL-low. The data to be programmed is applied 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. The M27512 can use PRESTO Programming Algorithm that drastically reduces the programming time (typically less than 50 seconds). Nevertheless to achieve compatibility with all programming equipment, the standard Fast Programming Algorithm may also be used.
Fast Programming Algorithm
Fast Programming Algorithm rapidly programs M27512 EPROMs using an efficient and reliable method suited to the production programming environment. Programming reliability is also ensured as the incremental program margin of each byte is continually monitored to determine when it has been successfully programmed. A flowchart of the M27512 Fast Programming Algorithm is shown in Figure 8.
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Mode |
E |
GVPP |
A9 |
Q0 - Q7 |
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Read |
VIL |
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VIL |
X |
Data Out |
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Output Disable |
VIL |
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VIH |
X |
Hi-Z |
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Program |
VIL Pulse |
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VPP |
X |
Data In |
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Verify |
VIH |
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VIL |
X |
Data Out |
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Program Inhibit |
VIH |
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VPP |
X |
Hi-Z |
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Standby |
VIH |
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X |
X |
Hi-Z |
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Electronic Signature |
VIL |
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VIL |
VID |
Codes |
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Note: X = VIH or VIL, VID = 12V ± 0.5%.
Table 4. Electronic Signature
Identifier |
A0 |
Q7 |
Q6 |
Q5 |
Q4 |
Q3 |
Q2 |
Q1 |
Q0 |
Hex Data |
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Manufacturer’s Code |
VIL |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
20h |
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Device Code |
VIH |
0 |
0 |
0 |
0 |
1 |
1 |
0 |
1 |
0Dh |
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3/11
M27512
AC MEASUREMENT CONDITIONS
Input Rise and Fall Times |
≤ 20ns |
Input Pulse Voltages |
0.45V to 2.4V |
Input and Output Timing Ref. Voltages |
0.8V to 2.0V |
Note that Output Hi-Z is defined as the point where data is no longer driven.
Figure 3. AC Testing Input Output Waveforms
2.4V
2.0V
0.8V
0.45V
AI00827
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER OUT TEST
CL = 100pF
CL includes JIG capacitance
AI00828
Table 5. Capacitance (1) (TA = 25 °C, f = 1 MHz )
Symbol |
Parameter |
Test Condition |
Min |
Max |
Unit |
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CIN |
Input Capacitance |
VIN = 0V |
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6 |
pF |
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COUT |
Output Capacitance |
VOUT = 0V |
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12 |
pF |
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Note: 1. Sampled only, not 100% tested.
Figure 5. Read Mode AC Waveforms
A0-A15 |
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VALID |
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tAVQV |
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tAXQX |
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E |
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tGLQV |
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tEHQZ |
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G |
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tELQV |
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tGHQZ |
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Hi-Z |
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Q0-Q7 |
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DATA OUT |
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AI00735 |
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4/11