SGS Thomson Microelectronics LNBP12SP, LNBP11SP, LNBP10SP, LNBP20PD, LNBP20CR Datasheet

	LNBP10 SERIES
	LNBP20
	LNB SUPPLY AND CONTROL VOLTAGE
	REGULATOR (PARALLEL INTERFACE)

■COMPLETE INTERFACE FOR TWO LNBs REMOTE SUPPLY AND CONTROL

■LNB SELECTION AND STAND-BY FUNCTION

■BUILT-IN TONE OSCILLATOR FACTORY TRIMMED AT 22KHz

■FAST OSCILLATOR START-UP

FACILITATES DiSEqC ENCODING

■TWO SUPPLY INPUTS FOR LOWEST DISSIPATION

■BYPASS FUNCTION FOR SLAVE OPERATION

■LNB SHORT CIRCUIT PROTECTION AND DIAGNOSTIC

■AUXILIARY MODULATION INPUT EXTENDS FLEXIBILITY

■CABLE LENGTH COMPENSATION

■INTERNAL OVER TEMPERATURE PROTECTION

■BACKWARD CURRENT PROTECTION

DESCRIPTION

Intended for analog and digital satellite receivers, the LNBP is a monolithic linear voltage regulator, assembled in Multiwatt-15, PowerSO-20 and PowerSO-10, specifically designed to provide the powering voltages and the interfacing signals to the LNB downconverter situated in the antenna via the coaxial cable. Since most satellite receivers have two antenna ports, the output voltage of the regulator is available at one of two logic-selectable output pins (LNBA, LNBB). When the IC is powered and put in Stand-by (EN pin LOW), both regulator outputs are disabled to allow the antenna downconverters to be supplied/controlled by others satellite receivers sharing the same coaxial lines. In this occurrence the device will limit at 3 mA (max) the backward current that could flow from LNBA and LNBB output pins to GND.

For slave operation in single dish, dual receiver systems, the bypass function is implemented by an electronic switch between the Master Input pin (MI) and the LNBA pin, thus leaving all LNB powering and control functions to the Master Receiver. This electronic switch is closed when the device is powered and EN pin is LOW.

Multiwatt-15

10

1

PowerSo-20 PowerSO-10

The regulator outputs can be logic controlled to be 13 or 18 V (typ.) by mean of the VSEL pin for remote controlling of LNBs. Additionally, it is possible to increment by 1V (typ.) the selected voltage value to compensate the excess voltage drop along the coaxial cable (LLC pin HIGH).

In order to reduce the power dissipation of the device when the lowest output voltage is selected, the regulator has two Supply Input pins VCC1 and VCC2. They must be powered respectively at 16V (min) and 23V (min), and an internal switch automatically will select the suitable supply pin according to the selected output voltage. If adequate heatsink is provided and higher power losses are acceptable, both supply pins can be powered by the same 23V source without affecting any other circuit performance.

The ENT (Tone Enable) pin activates the internal oscillator so that the DC output is modulated by a

±0.3 V, 22KHz (typ.) square wave. This internal oscillator is factory trimmed within a tolerance of

±2KHz, thus no further adjustments neither external components are required.

A burst coding of the 22KHz tone can be

September 1998

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LNBP10 SERIES - LNBP20

accomplished thanks to the fast response of the ENT input and the prompt oscillator start-up. This helps designers who want to implement the DiSEqC protocols (*).

In order to improve design flexibility and to allow implementation of newcoming LNB remote control standards, an analogic modulation input pin is available (EXTM). An appropriate DC blocking capacitor must be used to couple the modulating signal source to the EXTM pin. When external modulation is not used, the relevant pin can be left open.

Two pins are dedicated to the overcurrent protection/monitoring: CEXT and OLF. The overcurrent protection circuit works dynamically: as soon as an overload is detected in either LNB output, the output is shut-down for a time Toff determined by the capacitor connected between CEXT and GND. Simultaneously the OLF pin, that is an open collector diagnostic output flag,

from HIGH IMPEDANCE state goes LOW. After the time has elapsed, the output is resumed for a time ton=1/15toff (typ.) and OLF goes in HIGH IMPEDANCE. If the overload is still present, the protection circuit will cycle again through toff and ton until the overload is removed. Typical ton+toff value is 1200ms when a 4.7μF external capacitor is used.

This dynamic operation can greatly reduce the power dissipation in short circuit condition, still ensuring excellent power-on start up even with highly capacitive loads on LNB outputs.

The device is packaged in Multiwatt15 for thru-holes mounting and in PowerSO-20 for surface mounting. When a limited functionality in a smaller package matches design needs, a range of cost-effective PowerSO-10 solutions is also offered. All versions have built-in thermal protection against overheatingdamage.

(*): External components are needed to comply to level 2.x and above (bidirectional) DiSEqC bus hardware requirements. DiSEqC is a trademark of EUTELSAT.

ORDERING NUMBERS

Type	Multiwatt-15	PowerSO-20	PowerSO-10
LNBP10			LNBP10SP
LNBP11			LNBP11SP
LNBP12			LNBP12SP
LNBP13			LNBP13SP
LNBP14			LNBP14SP
LNBP15			LNBP15SP
LNBP16			LNBP16SP
LNBP20	LNBP20CR	LNBP20PD
PIN CONFIGURATIONS

Multiwatt-15

PowerSO-20

PowerSO-10

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LNBP10 SERIES - LNBP20

TABLE A: PIN CONFIGURATIONS

SYMBOL	NAME	FUNCTION		PIN NUMBER vs SALES TYPE (LNBP)
			20CR 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP
VCC1	Supply Input 1	15V to 25V supply. It is	1	2	1	1	1	1	1	1	1
		automatically selected
		when VOUT = 13 or 14V
VCC2	Supply Input 2	22V to 25V supply. It is	2	3	2	2	2	2	2	2	2
		automatically selected
		when VOUT = 18 or 19V
LNBA	Output Port	See truth tables for voltage	3	4	3	3	3	3	3	3	3
		and port selection. In
		stand-by mode this port is
		powered by the MI pin via
		the internal Bypass Switch
VSEL	Output Voltage	Logic control input: See	4	5	4	4	4	4	4	4	4
	Selection: 13 or	truth table
	18V (typ)
EN	Port Enable	Logic control input: See	5	6	5	5	5	5	5	5	5
		truth table
OSEL	Port Selection	Logic control input: See	7	7	9	NA	NA	NA	NA	NA	NA
		truth table
GND	Ground	Circuit Ground. It is	8	1	6	6	6	6	6	6	6
		internally connected to the		10
		die frame		11
				20
ENT	22 KHz Tone	Logic control input: See	9	13	7	7	7	7	7	7	7
	Enable	truth table
CEXT	External Capacitor	Timing capacitor used by	10	14	8	8	8	8	8	8	8
		the Dynamic Overload
		Protection. Typical
		application is 4.7 μF for a
		1200 ms cycle
EXTM	External	External Modulation Input.	11	15	NA	NA	NA	9	NA	9	9
	Modulation	Needs DC decoupling to
		the AC source. If not used,
		can be left open.
LLC	Line Length	Logic control input: See	12	16	NA	NA	9	NA	9	NA	10
	Compens. (1V typ)	truth table
OLF	Over Load Flag	Logic output (open	13	17	NA	9	NA	NA	10	10	NA
		Collector). Normally in
		HIGH IMPEDANCE, goes
		LOW when current or
		thermal overload occurs.
MI	Master Input	In stand-by mode, the	14	18	NA	10	10	10	NA	NA	NA
		voltage on MI is routed to
		LNBA pin. Can be left
		open if bypass function is
		not needed
LNBB	Output Port	See truth tables for voltage	15	19	10	NA	NA	NA	NA	NA	NA
		and port selection.

NOTE: The limited pin availability of the PowerSO-10 package leads to drop some functions.

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LNBP10 SERIES - LNBP20

ABSOLUTE MAXIMUM RATING

Symbol	Parameter	Value		Unit
Vi	DC Input Voltage (VCC1, VCC2, MI)		28	V
Io	Output Current (LNBA, LNBB)	Internally limited
Vi	Logic Input Voltage (ENT, EN, OSEL, VSEL, LLC)	-0.5 to 7		V
ISW	Bypass Switch Current	900		mA
Pt ot	Power Dissipation at Tcase < 85oC		14	W
Tstg	Storage Temperature Range	- 40	to 150	oC
To p	Operating Junction Temperature Range	- 40	to 125	oC

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

THERMAL DATA

Symbol	Parameter
Rt hjcase	Thermal Resistance Junction-case

LOGIC CONTROLS TRUTH TABLES

Control I/O		Pin Name			L
	OUT		OLF	IOUT > IOMAX or Tj > 150OC
	IN		ENT	22KHz tone OFF
	IN		EN	See table below
	IN		OSEL	See table below
	IN		VSEL	See table below
	IN		LLC	See table below
EN	OSEL	VSEL	LLCP	VLNBA
L	X	X	X	VMI -0.4V (typ.)
H	L	L	L	13V	(typ.)
H	L	H	L	18V	(typ.)
H	L	L	H	14V	(typ.)
H	L	H	H	19V	(typ.)
H	H	L	L	Disabled
H	H	H	L	Disabled
H	H	L	H	Disabled
H	H	H	H	Disabled

NOTE: All logic input pins have internal pull-down resistor (typ. = 250KΩ)

Value Unit

2 oC/W

H

IOUT < IOMAX

22KHz tone ON See table below See table below See table below See table below

VLNBB

Disabled Disabled Disabled Disabled Disabled 13V (typ.) 18V (typ.) 14V (typ.) 19V (typ.)

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LNBP10 SERIES - LNBP20

BLOCK DIAGRAM

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LNBP10 SERIES - LNBP20

ELECTRICAL CHARACTERISTICS FOR LNBP SERIES (Tj = 0 to 85 oC, Ci = 0.22 μF, Co = 0.1 μF, EN=H, ENT=L, LLC= L, VIN1 = 16V, VIN2 = 23V, IOUT = 50mA, (unless otherwise specified)

Symbol	Parameter	Test Conditions				Min.	Typ.	Max.	Unit
VIN1	VCC1 Supply Voltage	IO = 500mA, ENT=H, VSEL=L, LLC=L				15		25	V
		IO = 500mA, ENT=H, VSEL=L, LLC=H				16		25	V
VIN2	VCC2 Supply Voltage	IO = 500mA,	ENT=VSEL=H,		LLC=L	22		25	V
		IO = 500mA,	ENT=VSEL=H,		LLC=H	23		25	V
VO1	Output Voltage	IO = 500 mA,	VSEL=H, LLC=L			17.3	18	18.7	V
		IO = 500 mA,	VSEL=H, LLC=H				19		V
VO2	Output Voltage	IO = 500 mA,	VSEL=L, LLC=L			12.5	13	13.5	V
		IO = 500 mA,	VSEL=L, LLC=H				14		V
VO	Line Regulation	VIN1 = 15 to 18 V,		VOUT = 13 V			4	40	mV
		VIN2 = 22 to 25 V,		VOUT = 18 V			4	40	mV
VO	Load Regulation	VIN1 = VIN2 = 22 V,		VOUT = 13 or 18V,			80	180	mV
		IO = 50 to 500 mA

SVR

IMAX

tOFF tON

FTONE

ATONE

DT ONE

tr, tf

GEXT M

VEXTM

ZEXT M

VSW

VOL

IOZ

VIL

VI H

IIH

ICC

ICC

IOBK

TSHDN

Supply Voltage Rejection	VIN1 = VIN2 = 23 ± 0.5Vac, fac = 50 KHz			45		dB
Output Current Limiting			500	650	800	mA
Dynamic Overload Protection	Output shorted,	CEXT = 4.7μF		1100		ms
OFF Time
Dynamic Overload Protection	Output shorted,	CEXT = 4.7μF		tOFF/15		ms
ON Time
Tone Frequency	ENT=H		20	22	24	KHz
Tone Amplitude	ENT=H		0.4	0.6	0.8	Vpp
Tone Duty Cucle	ENT=H		40	50	60	%
Tone Rise or Fall Time	ENT=H		5	10	15	μs
External Modulation Gain	VOUT/ VEXTM,	f = 10Hz to 40KHz		5
External Modulation Input	AC Coupling				400	mVpp
Voltage
External Modulation	f = 10Hz to 40KHz			400		Ω
Impedance
Bypass Switch Voltage Drop	EN=L, ISW= 300mA, VCC2-VMI = 4V			0.35	0.6	V
(MI to LNBA)
Overload Flag Pin Logic Low	IOL = 8mA			0.28	0.5	V
Overload Flag Pin OFF State	VOH = 6V				10	μA
Leakage Current
Control Input Pin Logic Low					0.8	V
Control Input Pin Logic High			2.5			V
Control Pins Input Current	VIH = 5V			20		μA
Supply Current	Outputs Disabled (EN=L)			0.3	1	mA
Supply Current	ENT=H, IOUT = 500 mA			3.1	6	mA
Output Backward Current	EN=L, VLNBA = VLNBB = 18V			0.2	3	mA
	VIN1 = VIN2 = 22V or floating
Thermal Shutdown Threshold				150		oC

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