Order this document by MC12034A/D
MC12034A 2.0GHz Dual Modulus Prescaler MC12034B
The MC12034A can be used with CMOS synthesizers requiring positive |
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edges to trigger internal counters such as Motorola's MC145xxx series in a |
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PLL to provide tuning signals up to 2.0 GHz in programmable frequency |
MECL PLL COMPONENTS |
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steps. |
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32/33, |
64/65 |
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The MC12034B can be used with CMOS synthesizers requiring negative |
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edges to trigger internal counters such as Fujitsu's MB87001. |
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DUAL MODULUS PRESCALER |
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A Divide Ratio Control (SW) permits selection of a 32/33 or 64/65 divide |
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ratio as desired. |
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The Modulus Control (MC) selects the proper divide number after SW has |
SEMICONDUCTOR |
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been biased to select the desired divide ratio. |
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TECHNICAL DATA |
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• 2.0 GHz Toggle Frequency |
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• Supply Voltage 4.5 to 5.5 V |
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• MC12034A for Positive Edge Triggered Synthesizers |
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• 12mA Maximum, ±40 to 85°C, VCC = 5.5 Vdc |
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8 |
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• Modulus Control Input is Compatible with Standard CMOS and TTL |
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1 |
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• Low±Power 8.5 mA Typical |
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D SUFFIX |
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FUNCTIONAL TABLE |
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PLASTIC PACKAGE |
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CASE 751 |
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SW |
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MC |
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Divide Ratio |
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(SO±8) |
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H |
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H |
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32 |
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H |
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L |
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33 |
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L |
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H |
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64 |
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L |
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L |
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65 |
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NOTES: 1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin, |
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but this is not recommended due to increased power consumption. |
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2. MC: H = 2.0 V to VCC, L = GND to 0.8 V. |
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1 |
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Design Criteria |
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Value |
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Unit |
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P SUFFIX |
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Internal Gate Count * |
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67 |
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ea |
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PLASTIC PACKAGE |
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CASE 626 |
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Internal Gate Propagation Delay |
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200 |
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ps |
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Internal Gate Power Dissipation |
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0.75 |
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mW |
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Speed Power Product |
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0.15 |
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pJ |
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NOTE: *Equivalent to a two±input NAND gate. |
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PIN CONNECTIONS |
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MAXIMUM RATINGS |
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Characteristic |
Symbol |
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Range |
Unit |
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IN |
1 |
8 |
IN |
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Power Supply Voltage, Pin 2 |
VCC |
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±0.5 to +7.0 |
Vdc |
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V |
2 |
7 |
NC |
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CC |
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SW 3 |
6 |
MC |
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Operating Temperature Range |
TA |
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±40 to +85 |
°C |
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OUT |
4 |
5 |
Gnd |
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Storage Temperature Range |
Tstg |
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±65 to +150 |
°C |
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(Top View) |
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Modulus Control Input, Pin 6 |
MC |
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±0.5 to +6.5 |
Vdc |
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NOTES: 1. ESD data available upon request.
2.This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high
impedance circuit. For proper operation, Vin and Vout should be constrained |
ORDERING INFORMATION |
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to the range GND ≤ (Vin or Vout) ≤ VCC. |
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Operating |
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Device |
Temp Range |
Package |
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MC12034AD |
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SO±8 |
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MC12034AP |
TA = ±40° to +85°C |
Plastic |
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MC12034BD |
SO±8 |
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MC120348BP |
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Plastic |
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Motorola, Inc. 1997 |
Rev 3 |
MC12034A MC12034B
ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 5.5 Vdc, TA = ±40 to 85°C, unless otherwise noted.)
Characteristic |
Symbol |
Min |
Typ |
Max |
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Toggle Frequency (Sine Wave) |
ft |
0.5 |
2.4 |
2.0 |
GHz |
Supply Current Output Unloaded (Pin 2) |
ICC |
± |
8.5 |
12 |
mA |
Modulus Control Input High (MC) |
VIH1 |
2.0 |
± |
VCC |
V |
Modulus Control Input Low (MC) |
VIL1 |
± |
± |
0.8 |
V |
Divide Ratio Control Input High (SW) |
VIH2 |
VCC |
VCC |
VCC |
Vdc |
Divide Ratio Control Input Low (SW) |
VIL2 |
OPEN |
OPEN |
OPEN |
± |
Output Voltage Swing (CL = 12 pF, RL = 1.1 kΩ) |
Vout |
1.0 |
1.6 |
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Vpp |
Modulus Setup Time MC to Out |
tSET |
± |
8.0 |
10.0 |
ns |
Input Voltage Sensitivity 500±2000 MHz |
Vin |
100 |
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1500 |
mVpp |
Output Current (CL = 12 pF, RL = 1.1 kΩ) |
IO |
± |
± |
3.5 |
mA |
Figure 1. Logic Diagram (MC12034A) |
Figure 2. Modulus Setup Time |
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D |
Q |
D |
Q |
D |
Q |
PROP. DELAY |
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B |
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C |
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C |
QB |
C |
QB |
C |
QB |
IN |
M |
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In |
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In |
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OUT |
MC |
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MC |
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MC SETUP |
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D |
Q |
D |
QB |
D |
Q |
D |
QB |
D |
QB |
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MC RELEASE |
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E |
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F |
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G |
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H |
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Modulus setup time MC to out is the MC |
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C |
QB |
C |
Q |
C |
QB |
C |
Q |
C |
S Q |
Out |
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setup or MC release plus the prop. delay. |
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SW |
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Figure 3. Typical Output Waveform
500 m ≈ |
20 ns |
2 |
MOTOROLA RF/IF DEVICE DATA |
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