MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 3-Input 3-Output OR
Gate
The MC10H210 is designed to drive up to six transmission lines simultan± eously. The multiple outputs of this device also allow the wire ªORº±ing of several levels of gating for minimization of gate and package count.
The ability to control three parallel lines with minimum propagation delay from a single point makes the MC10H210 particularly useful in clock distribution applications where minimum clock skew is desired.
•Propagation Delay Average, 1.0 ns Typical
•Power Dissipation, 160 mW Typical
•Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range)
•Voltage Compensated
•MECL 10K±Compatible
MAXIMUM RATINGS
Characteristic |
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Symbol |
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Rating |
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Unit |
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Power Supply (VCC = 0) |
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VEE |
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±8.0 to 0 |
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Vdc |
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Input Voltage (VCC = 0) |
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VI |
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0 to VEE |
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Vdc |
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Output Current Ð Continuous |
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Iout |
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50 |
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mA |
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Ð Surge |
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100 |
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Operating Temperature Range |
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TA |
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0 to +75 |
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°C |
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Storage Temperature Range Ð Plastic |
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Tstg |
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±55 to +150 |
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°C |
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Ð Ceramic |
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±55 to +165 |
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°C |
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ELECTRICAL CHARACTERISTICS (VEE = ±5.2 V ±5%) (See Note) |
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0° |
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25° |
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75° |
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Characteristic |
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Symbol |
Min |
Max |
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Min |
Max |
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Min |
Max |
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Unit |
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Power Supply Current |
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IE |
Ð |
42 |
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Ð |
38 |
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Ð |
42 |
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mA |
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Input Current High |
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IinH |
Ð |
720 |
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Ð |
450 |
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Ð |
450 |
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μA |
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Input Current Low |
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IinL |
0.5 |
Ð |
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0.5 |
Ð |
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0.3 |
Ð |
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μA |
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High Output Voltage |
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VOH |
±1.02 |
±0.84 |
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±0.98 |
±0.81 |
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±0.92 |
±0.735 |
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Vdc |
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Low Output Voltage |
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VOL |
±1.95 |
±1.63 |
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±1.95 |
±1.63 |
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±1.95 |
±1.60 |
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Vdc |
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High Input Voltage |
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VIH |
±1.17 |
±0.84 |
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±1.13 |
±0.81 |
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±1.07 |
±0.735 |
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Vdc |
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Low Input Voltage |
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VIL |
±1.95 |
±1.48 |
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±1.95 |
±1.48 |
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±1.95 |
±1.45 |
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Vdc |
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AC PARAMETERS |
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Propagation Delay |
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tpd |
0.5 |
1.55 |
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0.55 |
1.55 |
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0.6 |
1.7 |
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Rise Time |
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tr |
0.75 |
1.8 |
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0.75 |
1.9 |
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0.8 |
2.0 |
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Fall Time |
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tf |
0.75 |
1.8 |
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0.75 |
1.9 |
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0.8 |
2.0 |
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ns |
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NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through a 50±ohm resistor to ±2.0 volts.
Note: If crosstalk is present, double bypass capacitor to 0.2 μF.
MC10H210
L SUFFIX
CERAMIC PACKAGE
CASE 620±10
P SUFFIX
PLASTIC PACKAGE
CASE 648±08
FN SUFFIX
PLCC
CASE 775±02
LOGIC DIAGRAM
5 |
2 |
6 |
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7 |
3 |
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4 |
9 |
12 |
10 |
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11 |
13 |
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14 |
VCC1 = PINS 1, 15
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1 |
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1 |
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16 |
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VCC2 |
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AOUT |
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2 |
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15 |
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VCC1 |
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AOUT |
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3 |
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14 |
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BOUT |
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AOUT |
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4 |
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13 |
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BOUT |
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AIN |
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5 |
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12 |
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BOUT |
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AIN |
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6 |
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11 |
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BIN |
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AIN |
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7 |
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10 |
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BIN |
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VEE |
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8 |
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9 |
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BIN |
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Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±11 of the Motorola MECL Data Book (DL122/D).
3/93
Motorola, Inc. 1996 |
2±293 |
REV 5 |
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