MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
1.1GHz Dual Modulus Prescaler
The MC12026 is a high frequency, low voltage dual modulus prescaler used in phase±locked loop (PLL) applications.
The MC12026A can be used with CMOS synthesizers requiring positive edges to trigger internal counters such as Motorola's MC145xxx series in a PLL to provide tuning signals up to 1.1GHz in programmable frequency steps.
The MC12026B can be used with CMOS synthesizers requiring negative edges to trigger internal counters.
A Divide Ratio Control (SW) permits selection of an 8/9 or 16/17 divide ratio as desired.
The Modulus Control (MC) selects the proper divide number after SW has been biased to select the desired divide ratio.
NOTE: The ªBº Version Is Not Recommended for New Designs
•1.1GHz Toggle Frequency
•Supply Voltage 4.5V to 5.5V
•Low Power 4.0mA Typical
•Operating Temperature Range of ±40°C to +85°C
•The MC12026 is Pin Compatible With the MC12022
•Short Setup Time (tset ) 6ns Typical @ 1.1GHz
•Modulus Control Input Level is Compatible With Standard CMOS and TTL
Pinout: 8±Lead Plastic (Top View)
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IN |
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NC |
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MC |
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GND |
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8 |
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7 |
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6 |
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5 |
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1 |
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2 |
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3 |
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4 |
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IN |
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VCC |
SW |
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OUT |
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MAXIMUM RATINGS
MC12026A
MC12026B
MECL PLL COMPONENTS
8/9, 16/17
DUAL MODULUS PRESCALER
P SUFFIX
8±LEAD PLASTIC PACKAGE
CASE 626±05
D SUFFIX
8±LEAD PLASTIC SOIC PACKAGE
CASE 751±05
FUNCTION TABLE
SW |
MC |
Divide Ratio |
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H |
H |
8 |
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H |
L |
9 |
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L |
H |
16 |
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L |
L |
17 |
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Note: SW: H = VCC, L = OPEN
MC: H = 2.0V to VCC; L = GND to 0.8V
Symbol |
Characteristic |
Range |
Unit |
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VCC |
Power Supply Voltage, Pin 2 |
±0.5 to +7.0 |
Vdc |
TA |
Operating Temperature Range |
±40 to +85 |
°C |
Tstg |
Storage Temperature Range |
±65 to +150 |
°C |
MC |
Modulus Control Input, Pin 6 |
±0.5 to +6.5 |
Vdc |
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IO |
Maximum Output Current, Pin 4 |
10.0 |
mA |
1/97
Motorola, Inc. 1997 |
1 |
REV 3 |
MC12026A MC12026B
ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 5.5; TA = ±40 to +85°C)
Symbol |
Characteristic |
Min |
Typ |
Max |
Unit |
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ft |
Toggle Frequency (Sin Wave) |
0.1 |
1.4 |
1.1 |
GHz |
ICC |
Supply Current Output Unloaded (Pin 2) |
Ð |
4.0 |
5.3 |
mA |
VIH1 |
Modulus Control Input High (MC) |
2.0 |
Ð |
VCC |
V |
VIL1 |
Modulus Control Input Low (MC) |
GND |
Ð |
0.8 |
V |
VIH2 |
Divide Ratio Control Input High (SW) |
VCC ± 0.5V |
VCC |
VCC + 0.5V |
V |
VIL2 |
Divide Ratio Control Input Low (SW) |
OPEN |
OPEN |
OPEN |
Ð |
Vout |
Output Voltage Swing |
1.0 |
1.6 |
Ð |
Vp±p |
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(RL = 560Ω; IO = 5.5mA)1 |
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(RL = 1.1kΩ; IO = 2.9mA)2 |
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t |
Modulus Setup Time MC to Out3 |
Ð |
6 |
9 |
ns |
SET |
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Vin |
Input Voltage Sensitivity |
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mVpp |
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100±250MHz |
400 |
Ð |
1000 |
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250±1100MHz |
100 |
Ð |
1000 |
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1.Divide Ratio of 8/9 at 1.1GHz, CL = 8pF
2.Divide Ratio of 16/17 at 1.1GHz, CL = 8pF
3.Assuming RL = 560Ω at 1.1GHz
D |
Q |
D |
Q |
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D |
Q |
C |
QB |
C |
QB |
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C |
QB |
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M |
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In |
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In |
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MC |
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1 |
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0 |
D |
QB |
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D |
QB |
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SW |
C |
Q |
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C |
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Q |
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Out |
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Figure 1. Logic Diagram (MC12026A)
Prop. Delay 
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In |
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Out |
MC Setup |
MC |
MC Release |
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Modulus setup time MC to out is the MC setup or MC release plus the prop delay.
Figure 2. Modulus Setup Time
MOTOROLA |
2 |
HIPERCOMM |
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BR1334 Ð Rev 4 |
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