Motorola MC13111AFTA, MC13111BFB, MC13111BFTA, MC13110AFB, MC13110AFTA Datasheet

							Order this document by MC13110A/D
							MC13110A/B
Advance Information							MC13111A/B
Universal	Cordless Telephone
Subsystem	IC
The MC13110A/B and MC13111A/B integrates several of the functions							UNIVERSAL
required for a cordless telephone into a single integrated circuit. This							NARROWBAND FM RECEIVER
significantly reduces component count, board space requirements, external
adjustments, and lowers overall costs. It is designed for use in both the							INTEGRATED CIRCUIT
handset and the base.

•MC13110A and MC13111A: Fully Programmable in all Power Modes

•MC13110B and MC13111B: MPU Clk Out and Second Local Oscillator

	are ªAlways Onº. There is No Inactive Mode
	• Dual Conversion FM Receiver
	± Complete Dual Conversion Receiver ± Antenna Input to Audio Out
		80 MHz Maximum Carrier Frequency		52	1
	± RSSI Output			FB SUFFIX
	±	Carrier Detect Output with Programmable Threshold	PLASTIC PACKAGE
	± Comparator for Data Recovery			CASE 848B
				(QFP±52)
	±	Operates with Either a Quad Coil or Ceramic Discriminator
	• Compander
	±	Expander Includes Mute, Digital Volume Control, Speaker Driver,
		Programmable Low Pass Filter, and Gain Block
	±	Compressor Includes Mute, Programmable Low Pass Filter, Limiter,		48	1
		and Gain Block
	• MC13110A/B only: Frequency Inversion Scrambler			FTA SUFFIX
	±	Function Controlled via MPU Interface	PLASTIC PACKAGE
				CASE 932
	± Programmable Carrier Modulation Frequency			(LQFP±48)
	• Dual Universal Programmable PLL		ORDERING INFORMATION
	± Supports New 25 Channel U.S. Standard with No External Switches
	±	Universal Design for Domestic and Foreign Cordless Telephone		Tested Operating
		Standards	Device	Temperature Range Package
	±	Digitally Controlled Via a Serial Interface Port	MC13110AFB		QFP±52
	± Receive Side Includes 1st LO VCO, Phase Detector, and 14±Bit
			MC13110AFTA		LQFP±48
		Programmable Counter and 2nd LO with 12±Bit Counter
	±	Transmit Section Contains Phase Detector and 14±Bit Counter	MC13110BFB		QFP±52
	± MPU Clock Outputs Eliminates Need for MPU Crystal		MC13110BFTA		LQFP±48
	• Low Battery Detect
			MC13111AFB	TA = ± 40° to +85°C
	±	Provides Two Levels of Monitoring with Separate Outputs			QFP±52
			MC13111AFTA		LQFP±48
	±	Separate, Adjustable Trip Points
	• 2.7 to 5.5 V Operation (15 μA Current Consumption in Inactive Mode)		MC13111BFB		QFP±52
	• AN1575: Refer to this Application Note for a List of the ªWorldwide		MC13111BFTA		LQFP±48
	Cordless Telephone Frequencies
		Simplified Block Diagram

	Rx In				Limiting IF	2nd LO	MPU Clock Out
		1st		2nd	Amplifier
		Mixer		Mixer		Detector	RSSI
	Rx PD In				RSSI
		1st LO	2nd LO				Carrier Detect Out
						Scrambler
							Data Out
	Rx PD Out	Rx Phase			μP Serial	Low Battery	Low Battery
		Detector			Interface	Detect	Indicator
	Tx PD Out	Tx Phase				Expander	Rx Out
		Detector					SPI
NOTE:	Tx Out		Scrambler	Compressor			Tx In

= MC13110A/B Only

This device contains 8262 active transistors.

This document contains information on a new product. Specifications and information herein

Motorola, Inc. 1997

Rev 0

are subject to change without notice.

MC13110A/B MC13111A/B

PIN CONNECTIONS

QFP±52

In

In

Out

GndRF

Out

In

SGndRF

RF

LimOut

1

2

Mix

Mix

Mix

LimIn

LimC1

LimC2

V

QCoil

Mix

Mix

1

1

1

2

2

CC

39

38

37

36

35

34

33

32

31

30

29

28

27

IF Amp/

Detector

1st Mix

2nd Mix

Limiter

LO In

40

2nd LO

RSSI

26

RSSI

1

1st LO

Scrambler

LO1Out

41

VCO

1st LO

25

Det Out

LPF

LPF

AALPF

V

Ctrl

42

Rx Gain

4.129 kHz

24

R

Audio In

cap

Adjust

x

Gnd Audio

43

Speaker

Rx

Bypass

23

V

Audio

Amp

Mute

2nd LO

CC

SA Out

44

22

DA In

Speaker

6 b Prog

SC Filter

2

SA In

45

Mute

SC Clk Ctr

Clock

Mic Amp

21

Tx In

Expander

40

Scrambler

46

Modulating Clock

20

E Out

Amp Out

Vol

ALC

Tx

Tx Gain

Ecap

Control

Limiter

4.129 kHz

47

Mute

Adjust

19

C In

E In

48

LPF

LPF

18

C Cap

Compressor

Bypass

C Cap

Scr Out

49

17

Tx Out

1st LO

14 b Prog

V

VB

Ref2

Ref2

50

Rx Ctr

16

BD2 Out

2nd LO

ref

Low Battery

Reg 2.5 V

25

Ref1

Detect

Ref

51

12 b Prog

15

DA Out

4

14 b Prog

Data

1

Ref Ctr

1

Tx Ctr

μP Serial

Amp

VB

52

14

BD1 Out

Interface

2nd LO

Rx Phase

Tx Phase

Prog

Carrier

10.240

Detect

Detect

Detect

Clk Ctr

1

2

3

4

5

6

7

8

9

10

11

12

13

In

Out

Vag

PD

ref

PD

Gnd PLL

VCO

Data

EN

Clk

Clk Out

CD Out

2

2

x

x

x

LO

LO

R

PLLV

T

T

LQFP±48

NOTE:

=

MC13110A/B Only

1

2

Out

Gnd RF

Out

Lim C1

Lim C2

RF

Lim Out

In

In

In

RSSI

Lim In

1

1

1

2

2

CC

Mix

Mix

Mix

Mix

Mix

V

36

35

34

33

32

31

30

29

28

27

26

25

IF Amp/

Detector

1st Mix

2nd Mix

Limiter

LO In

37

2nd LO

RSSI

24

Q Coil

1

1st LO

LO1Out

38

VCO

1st LO

Scrambler

23

Det Out

LPF

LPF

AALPF

V

Ctrl

39

Rx Gain

4.129 kHz

22

R

Audio In

cap

Adjust

x

Gnd Audio

40

Speaker

Rx

21

V

Audio

Mute

Bypass

CC

Amp

2nd LO

SA Out

41

20

DA In

Speaker

6 b Prog

SC Filter

2

Mic Amp

SA In

42

Mute

SC Clk Ctr

Clock

19

T

In

Expander

Scrambler

x

40

43

Modulating Clock

18

Amp Out

E Out

Vol

ALC

Tx

Tx Gain

E

44

Control

Limiter

17

C In

Mute

4.129 kHz

Adjust

cap

E In

45

LPF

LPF

16

C Cap

Compressor

Bypass

C Cap

Scr Out

46

15

T

Out

x

1st LO

14 b Prog

Vref

VB

VCC Audio

VB

47

2nd LO

Rx Ctr

14

BD Out

12 b Prog

25

Reg 2.5 V

Programmable

Data

LO2In

48

4

14 b Prog

Low Battery

Amp

13

DA Out

Ref Ctr

1

Tx Ctr

μP Serial

Detect

Rx Phase

Tx Phase

Interface

2nd LO

Prog

Carrier

10.240

Detect

Detect

Detect

Clk Ctr

1

2

3

4

5

6

7

8

9

10

11

12

Out

Vag

PD

ref

PD

Gnd PLL

VCO

Data

EN

Clk

Clk Out

CD Out

2

x

PLLV

x

x

LO

R

T

T

2	MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

MAXIMUM RATINGS

Characteristic	Symbol	Value	Unit
Power Supply Voltage	VCC	± 0.5 to +6.0	Vdc
Junction Temperature	TJ	± 65 to +150	°C
Maximum Power Dissipation, TA = 25°C	PD	70	mW

NOTES: 1. Devices should not be operated at these limits. The ªRecommended Operating Conditionsº provide for actual device operation.

2. ESD data available upon request.

RECOMMENDED OPERATING CONDITIONS

Characteristic	Symbol	Min	Typ	Max	Unit
Supply Voltage	VCC	2.7	3.6	5.5	Vdc
Operating Ambient Temperature	TA	±40	±	85	°C
Input Voltage Low (Data, Clk, EN)	VIL	±	±	0.3	V
Input Voltage High (Data, Clk, EN)	VIH	PLL Vref ±	±	±	V
		0.3
Bandgap Reference Voltage	VB	±	1.5	±	V

NOTE: 3. All limits are not necessarily functional concurrently.

DC ELECTRICAL CHARACTERISTICS (VCC = 3.6 V, TA = 25°C, unless otherwise specified, IP3 = 0;

Test Circuit Figure 1.)

Characteristic	Symbol	Figure	Min	Typ	Max	Unit
Static Current		1
Active Mode	ACT ICC		5.5	8.5	10.5	mA
Receive Mode	Rx ICC		3.1	4.1	5.3	mA
Standby Mode	STD ICC		±	465	560	μA
Inactive Mode [Note 4]	INACT ICC		±	15	30	μA
Current Increase When IP3 = 1	IIP3	1	±	1.4	1.8	mA
(Active and Receive Modes)

NOTE: 4. MC13110B/MC13111B versions have no inactive mode.

MOTOROLA ANALOG IC DEVICE DATA	3

MC13110A/B MC13111A/B

ELECTRICAL CHARACTERISTICS (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.)

		Input	Measure
Characteristic	Figure	Pin	Pin	Symbol	Min	Typ	Max	Unit

FM RECEIVER (fRF = 46.77 MHz [USA Ch 21], fdev = ± 3.0 kHz, fmod = 1.0 kHz, Vcap ctrl = 1.2 V)

Input Sensitivity (for 12 dB SINAD at Det Out	68, 69	Mix1	Det Out	VSIN				μVrms
Using C±Message Weighting Filter)		In1/In2			±	2.2	±	dBm
50 Ω Termination, Generator Referred					±	±100	±
Single±Ended, Matched Input, Generator					±	0.4	±
Referred					±	±115	±
Differential, Matched Input, Generator Referred					±	0.4	±
					±	±115	±
First and Second Mixer Voltage Gain Total	1	Mix1	Mix2 Out	MXgainT	24	29	±	dB
(Vin = 1.0 mVrms, with CF1 and CF2 Load)		In1 or In2
Isolation of First Mixer Output and Second Mixer	±	Mix1	Mix2 In	Mix±Iso	±	60	±	dB
Input (Vin = 1.0 mVrms, with CFI Removed)		In1 or In2
Total Harmonic Distortion (Vin = 3.16 mVrms)	1	Mix1	Det Out	THD	±	1.4	2.0	%
		In1 or In2
Recovered Audio (Vin = 3.16 mVrms)	1	Mix1	Det Out	AFO	80	112	150	mVrms
		In1 or In2
AM Rejection Ratio (Vin = 3.16 mVrms, 30% AM,	1	Mix1	Det Out	AMR	30	48	±	dB
@ 1.0 kHz)		In1 or In2
Signal to Noise Ratio (Vin = 3.16 mVrms,	±	Mix1	Det Out	SNR	±	48	±	dB
No Modulation)		In1 or In2
FIRST MIXER (No Modulation, fin = USA Ch21, 46.77 MHz, 50 Ω Termination at Inputs)
Input Impedance		±	Mix1					kΩ
Single±Ended	16		In1 or In2	RPS1	±	1.6	±	pF
				CPS1	±	3.7	±
Differential	16		Mix1
			In1/In2	RPD1	±	1.6	±
				CPD1	±	1.8	±
Output Impedance	14	±	Mix1 Out	RP1 Out	±	300	±	Ω
				CP1 Out	±	3.7	±	pF
Voltage Conversion Gain	17, 18	Mix1	Mix1 Out	MXgain1	±	12	±	dB
(Vin = 1.0 mVrms, with CF1 Filter as Load)		In1 or In2
1.0 dB Voltage Compression Level (Input Referred)		Mix1	Mix1 Out	VO Mix1				mVrms
IP3 Bit Set to 0	19, 21	In1 or In2		1 dB	±	20	±	dBm
					±	±21	±
IP3 Bit Set to 1	20, 21				±	56	±
					±	±12	±
Third Order Intercept (Input Referred) [Note 5]		Mix1	Mix1 Out	TOImix1				mVrms
IP3 Bit Set to 0	19, 21	In1 or In2			±	64	±	dBm
					±	±11	±
IP3 Bit Set to 1	20, 21				±	178	±
					±	±2.0	±
±3.0 dB IF Bandwidth	22	Mix1 In1	Mix1 Out	Mix1 BW	±	13	±	MHz
		or In2
NOTE: 5. Third order intercept calculated for input levels 10 dB below 1.0 dB compression point.

4	MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.)

		Input		Measure
Characteristic	Figure	Pin		Pin	Symbol	Min	Typ	Max	Unit
SECOND MIXER (No Modulation, fin = 10.7 MHz, 50 Ω Termination at Inputs)
Input Impedance	24	Mix2 In		Mix2 In	RP2 In	±	2.8	±	kΩ
					CP2 In	±	3.6	±	pF
Output Impedance	24	±		Mix2 Out	RP2 Out	±	1.5	±	kΩ
					CP2 Out	±	6.1	±	pF
Voltage Conversion Gain	26, 27	Mix2 In		Mix2 Out	MXgain2	±	20	±	dB
(Vin = 1.0 mVrms, with CF2 Filter as Load)
1.0 dB Voltage Compression Level (Input Referred)		Mix2 In		Mix2 Out	VO				mVrms
IP3 Bit Set 0	28, 30				Mix2	±	32	±	dBm
					1 dB	±	±17	±
IP3 Bit Set 1	29, 30					±	45	±
						±	±14	±
Third Order Intercept (Input Referred) [Note 6]		Mix2 In		Mix2 Out	TOImix2				mVrms
IP3 Bit Set 0	28, 30					±	136	±	dBm
						±	±4.3	±
IP3 Bit Set 1	29, 30					±	158	±
						±	±3.0	±
±3.0 dB IF Bandwidth	31	Mix2 In		Mix2 Out	Mix2 BW	±	2.5	±	MHz
LIMITER/DEMODULATOR (fin = 455 kHz, fdev = ±3.0 kHz, fmod = 1.0 kHz)
Input Impedance	49	Lim In		Lim In	RPLim	±	1.5	±	kΩ
					CPLim	±	16	±	pF
Detector Output Impedance	±	±		Det Out	RO	±	1.1	±	kΩ
IF ±3.0 dB Limiting Sensitivity	1	Lim In		Det Out	IF Sens	±	71	100	μVrms
Demodulator Bandwidth	±	Lim In		Det Out	BW	±	20	±	kHz
RSSI/CARRIER DETECT (No Modulation)
RSSI Output Dynamic Range	56	Mix1 In		RSSI	RSSI	±	80	±	dB
DC Voltage Range	56	Mix1 In		RSSI	DC RSSI	±	0.2 to	±	Vdc
							1.5
Carrier Detect Threshold	57	Mix1 In		CD Out	VT	±	15	±	μVrms
CD Threshold Adjust = (10100)
(Threshold Relative to Mix1 In Level)
Hysteresis, CD = (10100)	57	Mix1 In		CD Out	Hys	±	2.0	±	dB
(Threshold Relative to Mix1 In Level)
Output High Voltage	1	RSSI		CD Out	VOH	VCC ±	3.6	±	V
CD = (00000), RSSI = 0.2 V						0.1
Output Low Voltage	1	RSSI		CD Out	VOL	±	0.02	0.4	V
CD = (11111), RSSI = 0.9 V
Carrier Detect Threshold Adjustment Range	126	±		±	VT	±	±20 to	±	dB
(Programmable through MPU Interface)					Range		11
Carrier Detect Threshold ± Number of	126	±		±	VTn	±	32	±	±
Programmable Levels

NOTE: 6. Third order intercept calculated for input levels 10 dB below 1.0 dB compression point.

MOTOROLA ANALOG IC DEVICE DATA	5

MC13110A/B MC13111A/B

ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.)

		Input	Measure
Characteristic	Figure	Pin	Pin	Symbol	Min	Typ	Max	Unit
Rx AUDIO PATH (fin = 1.0 kHz, Active Mode, scrambler bypassed)
Absolute Gain (Vin = ± 20 dBV)	1, 72	Rx Audio In	SA Out	G	±4.0	0	4.0	dB
Gain Tracking	1, 76	E In	E Out	Gt				dB
(Referenced to E Out for Vin = ±20 dBV)
Vin = ± 30 dBV					±21	±20	±19
Vin = ± 40 dBV					±42	±40	±38
Total Harmonic Distortion (Vin = ± 20 dBV)	1, 76	Rx Audio In	SA Out	THD	±	0.7	1.0	%
Maximum Input Voltage (VCC = 2.7 V)	76	Rx Audio In	±	±	±	±11.5	±	dBV
Maximum Output Voltage (Increase input voltage	1	E In	E Out	VOmax	±2.0	0	±	dBV
until output voltage THD = 5.0%, then measure
output voltage)
Input Impedance	±	Rx Audio In	±	Zin	±	600	±	kΩ
		E In			±	7.5	±
Attack Time	±	E In	E Out	ta	±	3.0	±	ms
Ecap = 0.5 μF, Rfilt = 40 k (See Appendix B)
Release Time	±	E In	E Out	tr	±	13.5	±	ms
Ecap = 0.5 μF, Rfilt = 40 k (See Appendix B)
Compressor to Expander Crosstalk	1	C In	E Out	CT	±	±90	±70	dB
Vin = ±10 dBV, V(E In) = AC Gnd
Rx Muting ( Gain)	1	Rx Audio In	E Out	Me	±	±84	±60	dB
Vin = ±20 dBV, Rx Gain Adj = (01111)
Rx High Frequency Corner	1	Rx Audio In	Scr Out	Rx fch	3.779	3.879	3.979	kHz
Rx Path, V Rx Audio In = ±20 dBV
Low Pass Filter Passband Ripple (Vin = ±20 dBV)	1, 73	Rx Audio In	Scr Out	Ripple	±	0.4	0.6	dB
Rx Gain Adjust Range (Programmable through	125	Rx Audio In	Scr Out	Rx	±	±9.0 to	±	dB
MPU Interface)				Range		10
Rx Gain Adjust Steps ± Number of	125	Rx Audio In	Scr Out	Rx n	±	20	±	dB
Programmable Levels
Audio Path Noise, C±Message Weighting	70	Rx Audio In	Scr Out	EN	±	±85	±	dBV
(Input AC±Grounded)			E Out		±	<±95	±
			SA Out			<±95
Volume Control Adjust Range	123	E In	E Out	VcnRange	±	±14 to	±	dB
						16
Volume Control ± Number of Programmable	123	E In	E Out	Vcn	±	16	±	±
Levels
SPEAKER AMP/SP MUTE (Active Mode)
Maximum Output Swing	1, 79	SA In	SA Out	VOmax				Vpp
RL = No Load, Vin = 3.4 Vpp					2.8	3.2	±
RL = 130 Ω, Vin = 2.8 Vpp					2.0	2.6	±
RL = 620 Ω, Vin = 4.0 Vpp					±	3.4	±
Speaker Amp Muting	1	SA In	SA Out	Msp	±	±92	±60	dB
Vin = ±20 dBV, RL = 130 Ω

6	MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.)

		Input	Measure
Characteristic	Figure	Pin	Pin	Symbol	Min	Typ	Max		Unit
DATA AMP COMPARATOR
Hysteresis	1	DA In	DA Out	Hys	30	42	50		mV
Threshold Voltage	±	DA In	DA Out	VT	±	VCC ±	±		V
						0.7
Input Impedance	1	±	DA In	ZI	200	250	280		kΩ
Output Impedance	±	±	DA Out	ZO	±	100	±		kΩ
Output High Voltage	1	DA In	DA Out	VOH	VCC ±	3.6	±		V
Vin = VCC ± 1.0 V, IOH = 0 mA					0.1
Output Low Voltage	1	DA In	DA Out	VOL	±	0.1	0.4		V
Vin = VCC ± 0.4 V, IOL = 0 mA
Maximum Frequency	±	DA In	DA Out	Fmax	±	10	±		kHz
MIC AMP (fin = 1.0 kHz, External resistors set to gain of 1, Active Mode)
Open Loop Gain	±	Tx In	Amp Out	AVOL	±	100,000	±		V/V
Gain Bandwidth	±	Tx In	Amp Out	GBW	±	100	±		kHz
Maximum Output Swing (RL = 10 kΩ)	±	Tx In	Amp Out	VOmax	±	3.2	±		Vpp
Tx AUDIO PATH (fin = 1.0 kHz, Tx Gain Adj = (01111); ALC,		Limiter, and Mutes Disabled; Active Mode, scrambler bypassed)
Absolute Gain (Vin = ±10 dBV)	1, 83	Tx In	Tx Out	G	±4.0	0	4.0		dB
Gain Tracking	1, 87	Tx In	Tx Out	Gt					dB
(Referenced to Tx Out for Vin = ±10 dBV)
Vin = ± 30 dBV					±11	±10	±9.0
Vin = ± 40 dBV					±17	±15	±13
Total Harmonic Distortion (Vin = ± 10 dBV)	1, 87	Tx In	Tx Out	THD	±	0.8	1.8		%
Maximum Output Voltage (Increase input voltage	1	Tx In	Tx Out	VOmax	±2.0	0	±		dBV
until output voltage THD = 5.0%, then measure
output voltage. Tx Gain Adjust = 8 dB)
Input Impedance	±	±	C In	Zin	±	10	±		kΩ
Attack Time (Ccap = 0.5 μF, Rfilt = 40 k (See	±	C In	Tx Out	ta	±	3.0	±		ms
Appendix B))
Release Time (Ccap = 0.5 μF, Rfilt = 40 k (See	±	C In	Tx Out	tr	±	13.5	±		ms
Appendix B))
Expander to Compressor Crosstalk (Vin = ±20 dBV,	1	E In	Tx Out	CT	±	±60	±40		dB
Speaker Amp No Load, V(C In) = AC Gnd)
Tx Muting (Vin ± 10 dBV)	1	Tx In	Tx Out	Mc	±	±88	±60		dB
ALC Output Level (ALC enabled)	1, 87,	Tx In	Tx Out	ALCout					dBV
Vin = ±10 dBV	90				±15	±13	±8.0
Vin = ±2.5 dBV					±13	±11	±6.0
ALC Slope (ALC enabled)	1	Tx In	Tx Out	Slope	0.1	0.25	0.4		dB/dB
Vin = ±10 dBv
Vin = ±2.5 dBv
ALC Input Dynamic Range	±	C In	Tx Out	DR	±	±16 to	±		dBV
						±2.5
Limiter Output Level (Vin = ± 2.5 dBV,	1	Tx In	Tx Out	Vlim	±10	±8.0	±		dBV
Limiter enabled)
Tx High Frequency Corner [Note 7]	1	Tx In	Tx Out	Tx fc	3.6	3.7	3.8		kHz
(VTx In = ±10 dBV, Mic Amp = Unity Gain)
NOTE: 7. The filter specification is based on a 10.24 MHz 2nd LO, and a switched±capacitor (SC) filter counter divider ratio of 31. If other 2nd LO								frequencies
and/or SC filter counter divider ratios are used, the filter corner frequency will be proportional to the resulting SC filter clock frequency.

MOTOROLA ANALOG IC DEVICE DATA	7

MC13110A/B MC13111A/B

ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.)

		Input	Measure
Characteristic	Figure	Pin	Pin	Symbol	Min	Typ	Max	Unit
Tx AUDIO PATH (fin = 1.0 kHz, Tx Gain Adj = (01111); ALC,		Limiter, and Mutes Disabled; Active Mode, scrambler bypassed)
Low Pass Filter Passband Ripple (Vin = ±10 dBV)	1, 84	Tx In	Tx Out	Ripple	±	0.7	1.2	dB
Maximum Compressor Gain (Vin = ±70 dBV)	±	C In	Tx Out	AVmax	±	23	±	dB
Tx Gain Adjust Range (Programmable through	125	C In	Tx Out	Tx Range	±	±9.0 to	±	dB
MPU Interface)						10
Tx Gain Adjust Steps ± Number of Programmable	125	C In	Tx Out	Tx n	±	20	±	±
Levels

Rx AND Tx SCRAMBLER (2nd LO = 10.24 MHz, Tx Gain Adj = (01111), Rx Gain Adj = (01111), Volume Control = (0 dB Default Levels), SCF Clock Divider = 31. Total is divide by 62 for SCF clock frequency of 165.16 kHz)

Rx High Frequency Corner (Note 8)			±	Rx Audio In	Scr Out	Rx fch	3.55	3.65	3.75	kHz
Rx Path, f = 479 Hz, V Rx Audio In = ±20 dBV
Tx High Frequency Corner (Note 8)			±	Tx In	Tx Out	Tx fch	3.829	3.879	3.929	kHz
Tx Path, f = 300 Hz, V Tx In = ±10 dBV,
Mic Amp = Unity Gain
Absolute Gain						AV				dB
R	x	: V = ±20 dBV	±	Rx Audio In	E Out		±4.0	0.4	4.0
		in	±	Tx In	Tx Out		±4.0	±1.0	4.0
Tx: Vin = ±10 dBV, Limiter disabled
Pass Band Ripple			±	C In	E Out	Ripple	±	1.9	2.5	dB
Rx + Tx Path ± 1.0 μF from Tx Out to
Rx Audio In, fin = low corner frequency to
high corner frequency
Scrambler Modulation Frequency			±	Rx Audio In	E Out	fmod	4.119	4.129	4.139	kHz
Rx: 100 mV (±20 dBV)
T : 316 mV (±10 dBV)			±	C In	Tx Out
x
Group Delay										ms
Rx + Tx Path ± 1.0 μF from Tx Out to			±	C In	E Out	GD	±	1.0	±
Rx Audio In, fin = 1.0 kHz
fin = low corner frequency to high corner			±	C In	E Out	GD	±	4.0	±
frequency
Carrier Breakthrough			±	C In	E Out	CBT	±	±60	±	dB
Rx + Tx Path ± 1.0 μF from Tx Out to
Rx Audio In
Baseband Breakthrough			±	C In	E Out	BBT	±	±50	±	dB
Rx + Tx Path ± 1.0 μF from Tx Out to
Rx Audio In,
fin = 1.0 kHz, fmeas = 3.192 kHz
LOW BATTERY DETECT
Average Threshold			1, 131	Ref1	BD1 Out	VTi	1.38	1.48	1.58	V
Voltage Before Electronic Adjustment				Ref2	BD2 Out
(Vref_Adj = (0111))
Average Threshold			1	Ref1	BD1 Out	VTf	1.475	1.5	1.525	V
Voltage After Electronic Adjustment				Ref2	BD2 Out
(Vref_Adj = (adjusted value))
Hysteresis			±	Ref1	BD1 Out	Hys	±	4.0	±	mV
				Ref2	BD2 Out
Input Current (Vin = 1.0 and 2.0 V)			1	±	Ref1	Iin	±50	±	50	nA
					Ref2
Output High Voltage (Vin = 2.0 V)			1	Ref1	BD1 Out	VOH	VCC ±	3.6	±	V
				Ref2	BD2 Out		0.1

NOTE: 8. The filter specification is based on a 10.24 MHz 2nd LO, and a switch±capacitor (SC) filter counter divider ratio of 31. If other 2nd LO frequencies and/or SC filter counter divider ratios are used, the filter corner frequency will be proportional to the resulting SC filter clock frequency.

8	MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.)

		Input	Measure
Characteristic	Figure	Pin	Pin	Symbol	Min	Typ	Max	Unit
LOW BATTERY DETECT
Output Low Voltage (Vin = 1.0 V)	1	Ref1	BD1 Out	VOL	±	0.2	0.4	V
		Ref2	BD2 Out
BATTERY DETECT INTERNAL THRESHOLD
After Electronic Adjustment of VB Voltage	1, 128	VCC Audio	BD2 Out					V
BD Select = (111)				IBS7	3.381	3.455	3.529
BD Select = (110)				IBS6	3.298	3.370	3.442
BD Select = (101)				IBS5	3.217	3.287	3.357
BD Select = (100)				IBS4	3.134	3.202	3.270
BD Select = (011)				IBS3	2.970	3.034	3.098
BD Select = (010)				IBS2	2.886	2.948	3.010
BD Select = (001)				IBS1	2.802	2.862	2.922
PLL PHASE DETECTOR
Output Source Current	±	±	Rx PD	IOH	±	1.0	±	mA
(VPD = Gnd + 0.5 V to PLL Vref ± 0.5 V)			Tx PD
Output Sink Current	±	±	Rx PD	IOL	±	1.0	±	mA
(VPD = Gnd + 0.5 V to PLL Vref ± 0.5 V)			Tx PD
PLL LOOP CHARACTERISTICS
Maximum 2nd LO Frequency	±	LO2 In	±	f2ext	±	12	±	MHz
(No Crystal)
Maximum 2nd LO Frequency	±	±	LO2 In	f2ext	±	12	±	MHz
(With Crystal)			LO2 Out
Maximum Tx VCO (Input Frequency),	±	±	Tx VCO	ftxmax	±	80	±	MHz
Vin = 200 mVpp
PLL VOLTAGE REGULATOR
Regulated Output Level (IL = 0 mA, after Vref	1	±	PLL Vref	VO	2.4	2.5	2.6	V
Adjustment)
Line Regulation (IL = 0 mA, VCC = 3.0 to 5.5 V)	1	VCC Audio	PLL Vref	VRegLine	±	11.8	40	mV
Load Regulation (IL = 1.0 mA)	1	VCC Audio	PLL Vref	VReg	±20	±1.4	±	mV
				Load
MICROPROCESSOR SERIAL INTERFACE
Input Current Low (Vin = 0.3 V, Standby Mode)	1	±	Data,	IIL	±5.0	0.4	±	μA
			Clk, EN
Input Current High (Vin = 3.3 V, Standby Mode)	1	±	Data,	IIH	±	1.6	5.0	μA
			Clk, EN
Hysteresis Voltage	±	±	Data,	Vhys	±	1.0	±	V
			Clk, EN
Maximum Clock Frequency	±	Data,	±	±	±	2.0	±	MHz
		EN, Clk
Input Capacitance	±	Data,	±	Cin	±	8.0	±	pF
		Clk, EN
EN to Clk Setup Time	106	±	EN, Clk	tsuEC	±	200	±	ns
Data to Clk Setup Time	105	±	Data, Clk	tsuDC	±	100	±	ns
Hold Time	105	±	Data, Clk	th	±	90	±	ns
Recovery Time	106	±	EN, Clk	trec	±	90	±	ns
Input Pulse Width	±	±	EN, Clk	tw	±	100	±	ns
MPU Interface Power±Up Delay (90% of PLL Vref	108	±	±	tpuMPU	±	100	±	μs
to Data,Clk, EN)

MOTOROLA ANALOG IC DEVICE DATA	9

10

DATA DEVICE IC ANALOG MOTOROLA

Figure 1. Production Test Circuit (52 Pin QFP)

0.01

CF1

To VCC

CF2

10 μF

VCC

22.1 k

RF In

10.7 MHz

455 kHz

0.1

49.9

0.01

332

0.1

0.1

10

L2

0.01

Det Out

15 k

1000

Rx Audio In

L3

39

38

37

36

35

34

33

32

31

30

29

28

27

0.1

33

1 1

2

Out

Gnd RF

Out

In

SGnd RF

Lim In

1

2

RF

Lim Out

Q

RSSICoil

LO1

In

VCCAudio

10μF

110

40

1

1

2

2

CC

26

In

Mix In

Mix

Mix

Mix

Mix

LimC

LimC

V

10 μF

0.1

41

LO1 Out

Det Out

25

SA Out

DA In

V Cap Ctrl

Rx Audio In

42

24

0.1

SA In

49.9 k

Gnd Audio

VCC Audio

49.9 k

43

23

Tx In

0.1

49.9 k

44

SA Out

DA In

22

49.9 k

0.1

Tx In

45

SA In

MC13110A/B

21

Mic Amp Out

E Out

0.1 46

E Out

MC13111A/B

Amp Out

20

0.1

C In

1.0 μF

VCCA

47

E Cap

IC

C In

19

0.1

VCCA

7.5 k

E In

0.1

48

E In

C Cap

18

Scr Out

TxOut

T

Out

0.1

49

17

x

100 kVCC

1.0μF

50

Ref2

BD2Out

16

Scr Out

51

Ref1

DA Out

15

BD2 Out

7.5 k

LO

LO

V

R

VPLL

T

GndPLL

T

Data

EN

Clk

OutClk

CD

Out

ref1

V

1.0 k

52

VB

In

Out

ag

PD

ref

PD

VCO

BD1Out

14

Data Out

0.1

2

2

x

x

x

BD1 Out

100 k

VCC

V

1.0 k

1

2

3

4

5

6

7

8

9

10

11

12

13

ref2

0.1

100 k

1.0 μF

0.01

Carrier

Tx VCO

Detect Out

22.1 k

1.5 k

10.240 MHz

0.1

MPU Clock Output

32.4 k

0.047

5.0 ± 50

8.2

10μF

0.1

4700

3.01 k

0.1

Legend:

If ≥ 1, then capacitor value = pF

Rx Loop Filter

NOTE: This schematic is only a partial representation of the actual production test circuit.

If <1, then capacitor value = μF

MC13111A/B MC13110A/B

				MC13110A/B MC13111A/B
					PIN FUNCTION DESCRIPTION
Pin		Symbol/
LQFP±48	QFP±52	Type	Equivalent Internal Circuit (52 Pin QFP)						Description
48	1	LO2 In		PLL					These pins form the PLL reference oscillator when
1	2	LO2 Out							connected to an external parallel±resonant crystal
				Vref					(10.24 MHz typical). The reference oscillator is
									also the second Local Oscillator (LO2) for the RF
							PLL		receiver. ªLO Inº may also serve as an input for
			1		100	PLL	Vref		2
									an externally generated reference signal which is
			LO2			Vref			typically ac±coupled.
			In
							100	2	When the IC is set to the inactive mode, LO2 In is
								LO2	internally pulled low to disable the oscillator. The
									input capacitance to ground at each pin (LO2 In/
								Out
									LO2 Out) is 3.0 pF.
2	3	Vag			VCC	PLL			Vag is the internal reference voltage for the
									switched capacitor filter section. This pin must be
					Audio
						Vref			μ
									decoupled with a 0.1 F capacitor.
							3
					30 k		Vag
3	4	Rx PD			PLL	PLL			This pin is a tri±state voltage output of the Rx and
		(Output)			Vref				Tx Phase Detector. It is either ªhighº, ªlowº, or ªhigh
						Vref
									impedance,º depending on the phase difference of
									the phase detector input signals. During lock, very
						15	4, 6		narrow pulses with a frequency equal to the
5	6	Tx PD							reference frequency are present. This pin drives
							Rx PD,
		(Output)							the external Rx and Tx PLL loop filters. Rx and Tx
							Tx PD		PD outputs can sink or source 1.0 mA.
4	5	PLL Vref				VCC			PLL Vref is a PLL voltage regulator output pin. An
									internal voltage regulator provides a stable power
						Audio
									supply voltage for the Rx and Tx PLL's and can
									also be used as a regulated supply voltage for
									other IC's. It can source up to 1.0 mA externally.
					5				Proper supply filtering is a must on this pin. PLL
				PLL V					Vref is pulled up to VCC audio for the standby and
					ref	132 k			inactive modes (Note 1).
6	7	Gnd PLL							Ground pin for digital PLL section of IC.
7	8	Tx VCO							Tx VCO is the transmit divide counter input which
		(Input)							is driven by an ac±coupled external transmit loop
									VCO. The minimum signal level is 200 mVpp @
					PLL				60.0 MHz. This pin also functions as the test mode
									input for the counter tests.
					Vref		PLL
							Vref
				8	1.0 k
				TX VCO

MOTOROLA ANALOG IC DEVICE DATA	11

MC13110A/B MC13111A/B

PIN FUNCTION DESCRIPTION (continued)

Pin

Symbol/

LQFP±48

QFP±52

Type

Equivalent Internal Circuit (52 Pin QFP)

Description

8

9

Data

VCC

Microprocessor serial interface input pins are for

9

10

EN

PLL

programming various counters and control

Audio

10

11

Clk

Vref

functions. The switching thresholds are referenced

(Input)

to PLL Vref and Gnd PLL. The inputs operate up to

9, 10, 11

240

μ

VCC. These pins have 1.0 A internal pull±down

currents.

Data, EN, Clk

1.0

μA

11

12

Clk Out

The microprocessor clock output is derived from

(Output)

the 2nd LO crystal oscillator and a programmable

divider with divide ratios of 2 to 312.5. It can be

VCC

used to drive a microprocessor and thereby

VCC

reduce the number of crystals required in the

Audio

system design. The driver has an internal resistor

Audio

in series with the output which can be combined

1.0 k

12

with an external capacitor to form a low pass filter

to reduce radiated noise on the PCB. This output

Clk Out

also functions as the output for the counter test

modes.

1) For the MC13110A/B and MC13111A/B the Clk

Out can be disabled via the MPU interface.

2) For the MC13110B and MC13111B this output is always active (on) (Note 2).

12	13	CD Out	VCC		Dual function pin;
		(I/O)		PLL
			Audio	Vref	1) Carrier detect output (open collector with
					external 100 kΩ pull±up resistor.
		13	240	Hardware	2) Hardware interrupt input which can be used to
		CD Out		Interrupt	ªwake±upº from the Inactive Mode.
				CD
				Comparator
±	14	BD1 Out		VCC	Low battery detect output #1 is an open collector
					with external pull±up resistor.
				Audio
14	16	BD2 Out		14, 16	Low battery detect output #2 is an open collector
				BD1 Out
		(Output)			with external pull±up resistor.
				BD2 Out
13	15	DA Out	VCC	VCC	Data amplifier output (open collector with internal
		(Output)			100 kΩ pull±up resistor).
			Audio	Audio
			100 k
				15
				DA Out
15	17	Tx Out		VCC	Tx Out is the Tx path audio output. Internally this
		(Output)			pin has a low±pass filter circuitry with ±3 dB
				Audio	bandwidth of 4.0 kHz. Tx gain and mute are
					programmable through the MPU interface. This pin
				17	is sensitive to load capacitance.
				Tx Out
			VB

12	MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

PIN FUNCTION DESCRIPTION (continued)

Pin

Symbol/

LQFP±48

QFP±52

Type

Equivalent Internal Circuit (52 Pin QFP)

Description

16

18

C Cap

V

VCC

C Cap is the compressor rectifier filter capacitor

CC

Audio

pin. It is recommended that an external filter

Audio

capacitor to VCC audio be used. A practical

40 k

capacitor range is 0.1 to 1.0 μF. 0.47 μF is the

18

recommended value.

C Cap

17	19	C In		VCC		C In is the compressor input. This pin is internally
		(Input)				biased and has an input impedance of 12.5 k. C In
				Audio
						must be ac±coupled.
			19	12.5 k
			C In
					VB
18	20	Amp Out	VCC		VCC	Microphone amplifier output. The gain is set with
		(Output)				external resistors. The feedback resistor should be
			Audio		Audio	less than 200 kΩ.
			21		20
19	21	Tx In				Tx In is the Tx path input to the microphone
			Tx In
		(Input)			Amp Out	amplifier (Mic Amp). An external resistor is
						connected to this pin to set the Mic Amp gain and
				VB		input impedance. Tx In must be ac±coupled, too.
20	22	DA In		VCC		The data amplifier input (DA In) resistance is
		(Input)		Audio		250 kΩ and must be ac±coupled. Hysteresis is
			VCC			internally provided.
			Audio
				250 k	250 k
			22
			DA In
21	23	VCC Audio				VCC audio is the supply for the audio section. It is
						necessary to adequately filter this pin.
22	24	Rx Audio In		VCC		The Rx audio input resistance is 600 kΩ and must
		(Input)				be ac±coupled.
				Audio
			24	600 k
			Rx Audio In
					VB
23	25	Det Out	VCC	VCC		Det Out is the audio output from the FM detector.
		(Output)				This pin is dc±coupled from the FM detector and
			RF	Audio
						has an output impedance of 1100 Ω.
				240	25
				30 μA	Det Out

MOTOROLA ANALOG IC DEVICE DATA	13

MC13110A/B MC13111A/B

PIN FUNCTION DESCRIPTION (continued)

Pin

Symbol/

LQFP±48

QFP±52

Type

Equivalent Internal Circuit (52 Pin QFP)

Description

30

26

RSSI

VCC

RSSI is the receive signal strength indicator. This

pin must be filtered through a capacitor to ground.

RF

The capacitance value range should be 0.01 to

0.1 μF. This is also the input to the Carrier Detect

VCC

VCC

comparator. An external R to ground shifts the

RSSI voltage.

RF

Audio

							26
							RSSI
			186 k
24	27	Q Coil			VCC			A quad coil or ceramic discriminator connects this
								pin as part of the FM demodulator circuit.
					RF	VCC
								DC±couple this pin to VCC RF through the quad
						RF
			27					coil or the external resistor.
			Q Coil
26	29	VCC RF						VCC supply for RF receiver section (1st LO, mixer,
								limiter, demodulator). Proper supply filtering is
								needed on this pin too.
25	28	Lim Out						A quad coil or ceramic discriminator are connected
			VCC VCC VCC					to these pins as part of the FM demodulator circuit.
								A coupling capacitor connects this pin to the quad
			RF	RF	RF	VCC		coil or ceramic discriminator as part of the FM
					53.5 k	RF		demodulator circuit. This pin can drive coupling
			31					capacitors up to 47 pF with no deterioration in
			Lim C1				28	performance.
27	30	Lim C2	32				Lim Out IF amplifier/limiter capacitor pins. These
28	31	Lim C1	Lim In		1.5 k			decoupling capacitors should be 0.1 μF. They
			30					determine the IF limiter gain and low frequency
			Lim C2		52 k			bandwidth.
29	32	Lim In						Signal input for IF amplifier/limiter. Signals should
		(Input)						be ac±coupled to this pin. The input impedance is
								1.5 kΩ at 455 kHz.
±	33	SGnd RF						This pin is not connected internally but should be
								grounded to reduce potential coupling between
								pins.
31	34	Mix2 In				V		Mix2 In is the second mixer input. Signals are to be
		(Input)				CC		ac±coupled to this pin, which is biased internally to
					VCC	RF
								VCC RF. The input impedance is
					RF
								2.8 kΩ at 455 kHz. The input impedance can be
					3.0 k			reduced by connecting an external resistor to
			34					VCC RF.
			Mix2 In
14								MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

PIN FUNCTION DESCRIPTION (continued)

Pin

Symbol/

LQFP±48

QFP±52

Type

Equivalent Internal Circuit (52 Pin QFP)

Description

32

35

Mix2 Out

VCC

VCC

Mix2 Out is the second mixer output. The second

(Output)

mixer has a 3 dB bandwidth of 2.5 MHz and an

RF

RF

output impedance of 1.5 kΩ. The output current

1.2 k

drive is 50 μA.

35

Mix2 Out

33

36

Gnd RF

Ground pin for RF section of the IC.

34

37

Mix1 Out

V

The first mixer has a 3 dB IF bandwidth of 13 MHz

(Output)

CC

VCC

Ω

RF

RF

and an output impedance of 300 . The output

current drive is 300 μA and can be programmed

for 1.0 mA.

			200	37
				Mix1 Out
35	38	Mix1 In2		V		Signals should be ac±coupled to this pin, which is
		(Input)		ref		biased internally to VCC ± 1.6 V. The single±ended
				20 k		and differential input impedance are about 1.6 and
			VCC		VCC	1.8 kΩ at 46 MHz, respectively.
			RF		RF
			950	950
36	39	Mix1 In1	38, 39
		(Input)	Mix1 In2,
			Mix1 In1
37	40	LO1 In				Tank Elements, an internal varactor and capacitor
38	41	LO1 Out				matrix for 1st LO multivibrator oscillator are
						connected to these pins. The oscillator is useable
						up to 80 MHz.
			41		40
			LO1		LO1
			Out		In
39	42	Vcap Ctrl				Vcap Ctrl is the 1st LO varactor control pin. The
				VCC		voltage at this pin is referenced to Gnd Audio and
						varies the capacitance between LO1 In and
				RF
						LO2 Out. An increase in voltage will decrease
				55 k	42	capacitance.
					Vcap
					Ctrl
40	43	Gnd Audio				Ground for audio section of the IC.
41	44	SA Out	VCC	VCC		The speaker amplifier gain is set with an external
		(Output)	Audio	Audio		Ω
						feedback resistor. It should be less than 200 k .
						The speaker amplifier can be muted through the
			45		44	MPU interface.
			SA In
42	45	SA In			SA Out	An external resistor is connected to the speaker
		(Input)				amplifier input (SA In). This will set the gain and
			VB			input impedance and must be ac±coupled.

MOTOROLA ANALOG IC DEVICE DATA	15

MC13110A/B MC13111A/B

PIN FUNCTION DESCRIPTION (continued)

Pin

Symbol/

LQFP±48

QFP±52

Type

Equivalent Internal Circuit (52 Pin QFP)

Description

43

46

E Out

VCC

The output level of the expander output is

(Output)

Audio

determined by the volume control. Volume control

is programmable through the MPU interface.

46

E Out

VB

44

47

E Cap

VCC

V

E Cap is the expander rectifier filter capacitor pin.

Audio

CC

Connect an external filter capacitor between VCC

Audio

audio and E Cap. The recommended capacitance

40 k

47

range is 0.1 to 1.0 μF. 0.47 μF is the suggested

value.

E Cap

45	48	E In	VCC			The expander input pin is internally biased and has
		(Input)	Audio			input impedance of 30 kΩ.
			48	30 k
			E In
				VB
46	49	Scr Out		VCC		Scr Out is the Rx audio output. An internal low
		(Output)		Audio		pass filter has a ±3 dB bandwidth of 4.0 kHz.
					49
					Scr Out
			VB
±	50	Ref	VCC			Reference voltage input for Low Battery Detect #2.
		2	Audio
			50, 51
±	51	Ref	Ref2, Ref1			Reference voltage input for Low Battery Detect #1.
		1
47	52	V	VCC			V is the internal half supply analog ground
		B	Audio	VCC		B
						reference. This pin must be filtered with a
				Audio
						capacitor to ground. A typical capacitor range of
				240	52	0.5 to 10 μF is desired to reduce crosstalk and
						noise. It is important to keep this capacitor value
					VB	equal to the PLL Vref capacitor due to logic timing
						(Note 9).

NOTE: 9. A capacitor range of 0.5 to 10 μF is recommended. The capacitor value should be the same used on the VB pin (Pin 52). An additional high quality parallel capacitor of 0.01 μF is essential to filter out spikes originating from the PLL logic circuitry.

16	MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

DEVICE DESCRIPTION AND APPLICATION INFORMATION

The following text, graphics, tables and schematics are provided to the user as a source of valuable technical information about the Universal Cordless Telephone IC. This information originates from thorough evaluation of the device performance for the US and French applications. This data was obtained by using units from typical wafer lots. It is important to note that the forgoing data and information was from a limited number of units. By no means is the user to assume that the data following is a guaranteed parametric. Only the minimum and maximum limits identified in the electrical characteristics tables found earlier in this spec are guaranteed.

General Circuit Description

The MC13110A/B and MC13111A/B are a low power dual conversion narrowband FM receiver designed for applications up to 80 MHz carrier frequency. This device is primarily designated to be used for the 49 MHz cordless phone (CT±0), but has other applications such as low data rate narrowband data links and as a backend device for 900 MHz systems where baseband analog processing is required. This device contains a first and second mixer, limiter, demodulator, extended range receive signal strength (RSSI), receive and transmit baseband processing, dual programmable PLL, low battery detect, and serial interface for microprocessor control. The FM receiver can also be used with either a quadrature coil or ceramic resonator. Refer to the Pin Function Description table for the simplified internal circuit schematic and description of this device.

DC Current and Battery Detect

Figures 3 through 6 are the current consumption for Inactive, Standby, Receive, and Active modes versus supply voltages. Figures 7 and 8 show the typical behavior of current consumption in relation to temperature. The relationship of additional current draw due to IP3 bit set to <1> and supply voltage are shown in Figures 9 and 10.

For the Low Battery Detect, the user has the option to operate the IC in the programmable or non±programmable modes. Note that the 48 pin package can only be used in the programmable mode. Figure 128 describes this operation (refer to the Serial Interface section under Clock Divider Register).

In the programmable mode several different internal threshold levels are available (Figure 2). The bits are set through the SCF Clock Divider Register as shown in Figures 108 and 126. The reference for the internal divider network is VCC Audio. The voltages on the internal divider network are compared to the Internal Reference Voltage, VB, generated by an internal source. Since the internal comparator used is non±inverting, a high at VCC Audio will yield a high at the

battery detect output, and vice versa for VCC Audio set to a low level. For the 52 pin package option, the Ref 1 and Ref 2 pins need to be tied to VCC when used in the programmable mode. It is essential to keep the external reference pins above Gnd to prevent any possible power±on reset to be activated.

When considering the non±programmable mode (bits set to <000>) for the 52 pin package, the Ref 1 and Ref 2 pins become the comparators reference. An internal switch is activated when the non±programmable mode is chosen connecting Ref 1 and Ref 2. Here, two external precision resistor dividers are used to set independent thresholds for two battery detect hysteresis comparators. The voltages on Ref 1 and Ref 2 are again compared to the internally generated 1.5 V reference voltage (VB).

The Low Battery Detect threshold tolerance can be improved by adjusting a trim±pot in the external resistor divider (user designed). The initial tolerance of the internal reference voltage (VB) is ±6.0%. Alternately, the tolerance of the internal reference voltage can be improved to ±1.5% through MPU serial interface programming (refer to the Serial Interface section, Figure 131). The internal reference can be measured directly at the ªVBº pin. During final test of the telephone, the VB internal reference voltage is measured. Then, the internal reference voltage value is adjusted electronically through the MPU serial interface to achieve the desired accuracy level. The voltage reference register value should be stored in ROM during final test so that it can be reloaded each time the combo IC is powered up. The Low Battery Detect outputs are open collector. The battery detect levels will depend on the accuracy of the VB voltage. Figure 12 indicates that the VB voltage is fairly flat over temperature.

Figure 2. Internal Low Battery Detect Levels

(with VB = 1.5 V)

Battery	Ramping	Ramping	Average	Hysteresis
Detect	Up	Down	(V)	(mV)
Select	(V)	(V)
0	±	±	±	±
1	2.867	2.861	2.864	4.0
2	2.953	2.947	2.950	6.0
3	3.039	3.031	3.035	8.0
4	3.207	3.199	3.204	8.0
5	3.291	3.285	3.288	6.0
6	3.375	3.367	3.371	8.0
7	3.461	3.453	3.457	8.0

NOTE: 10. Battery Detect Select 0 is the non±programmable operating mode.

MOTOROLA ANALOG IC DEVICE DATA	17

MC13110A/B MC13111A/B

DC CURRENT

Figure 4. Current versus Supply

Figure 3. Current versus Supply

Voltage Inactive Mode

	40
A)	35
(μ
CURRENT	30
	25
SUPPLY	20
	15
IC,	10
INACT
	5.0
I
	0	3.1	3.5	3.9	4.3	4.7	5.1	5.5
	2.7

VCC, SUPPLY VOLTAGE (V)

Voltage Standby Mode, MCU

Clock Output ± On at 2.048 MHz

(mA)	1.0
	0.9					MCU Clock Out On
CURRENT	0.8
	0.7
	0.6
, SUPPLY
	0.5
	0.4					MCU Clock Out Off
CC	0.3
I
STD
	0.2
	0.1
	0	3.1	3.5	3.9	4.3	4.7	5.1	5.5
	2.7
			VCC, SUPPLY VOLTAGE (V)

Figure 5. Current versus Supply

Voltage Receive Mode

	5.0
(mA)	4.9
	4.8
CURRENT
	4.7
	4.6				MCU Clock Out On
,SUPPLY	4.5
	4.4
	4.3
CC
					MCU Clock Out Off
I	4.2
x
R	4.1
	4.02.7	3.1	3.5	3.9	4.3	4.7	5.1	5.5
			VCC, SUPPLY VOLTAGE (V)

Figure 6. Current versus Supply Voltage

Active Mode

	8.0
(mA)	7.9					MCU Clock Out On
	7.8
CURRENT
	7.7
	7.6
, SUPPLY	7.5
	7.4					MCU Clock Out Off
	7.3
CC
I	7.2
ACT
	7.1
	7.0	3.1	3.5	3.9	4.3	4.7	5.1	5.5
	2.7
			VCC, SUPPLY VOLTAGE (V)

Figure 7. Current versus	Figure 8. Current versus
Temperature Normalized to 25°C	Temperature Normalized to 25°C

C)	15														C)	6.0										Receive
																4.0
°															°
25															25
FROM	10														FROM	2.0										Active
																0
(%	5.0														(%
DRAIN															DRAIN	±2.0
CURRENT												Standby			CURRENT	±4.0
	±5.0
												Inactive
	0															±6.0
DELTA															DELTA	±8.0
																±10
	±10	±30	±20	±10	0	10	20	30	40	50	60	70	80	90		±12	±30	±20	±10	0	10	20	30	40	50	60	70	80	90
	±40															±40
					TA, TEMPERATURE (°C)																TA, TEMPERATURE (°C)
18																		MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

DC CURRENT

Figure 10. Additional IP3

Figure 9. Additional Supply Current Consumption versus Supply Voltage, IP3 = <1>

	1.50
	1.48
(mA)	1.46
	1.44
DRAIN
	1.42										Receive/Active
CURRENT	1.40
	1.38
	1.36
DELTA
	1.34
	1.32
	1.30	2.9	3.1	3.3	3.5	3.7	3.9	4.1	4.3	4.5	4.7	4.9	5.1	5.3	5.5
	2.7
					VCC, SUPPLY VOLTAGES (V)

Supply Current Consumption versus

Temperature Normalized to 25°C

C)	10
°
25	5
FROM
	0
(%
										Receive/Active
DRAIN
	±5
CURRENT	±10
	±15
DELTA
	±20
		±30	±20	±10	0	10	20	30	40	50	60	70	80	90
	±40
					TA, TEMPERATURE (°C)

Figure 11. Current Standby	Figure 12. VB Voltage versus Temperature
Mode versus MCU Clock Output	Normalized to 1.5 V at 25°C

	800	10 pF load				1.5075
SUPPLY CURRENT (mA)	750				VB VOLTAGE (V)
	700					1.5050
	650					1.5025
	600
		No load
	550					1.5000
	500
,	450				NORMALIZED	1.4975
CC
I	400
STD		MCU clock off			,	1.4950
	350				s
					V
	300	10	100	1000		1.4925	±10	0	10	20	30	40	50	60	70	80	90
	1.0					±20
		MCU CLK OUT DIVIDE VALUE								TA, TEMPERATURE (°C)

MOTOROLA ANALOG IC DEVICE DATA	19

MC13110A/B MC13111A/B

FIRST AND SECOND MIXER

Mixer Description	Figure 14. First Mixer Output Impedance

The 1st and 2nd mixers are similar in design. Both are double balanced to suppress the LO and the input frequencies to give only the sum and difference frequencies at the mixer output. Typically the LO is suppressed better than ±50 dB for the first mixer and better than ±40 dB for the second mixer. The gain of the 1st mixer has a ±3.0 dB corner at approximately 13 MHz and is used at a 10.7 MHz IF. It has an output impedance of 300 Ω and matches to a typical 10.7 MHz ceramic filter with a source and load impedance of 330 Ω. A series resistor may be used to raise the impedance for use with crystal filters. They typically have an input impedance much greater than 330 Ω.

First Mixer

Figures 17 through 20 show the first mixer transfer curves for the voltage conversion gain, output level, and intermodulation. Notice that there is approximately 10 dB linearity improvement when the ªIP3 Increaseº bit is set to <1>. The ªIP3 Increaseº bit is a programmable bit as shown in the Serial Programmable Interface section under the Rx Counter Latch Register. The IP3 = <1> option will increase the supply current demand by 1.3 mA.

Figure 13. First Mixer Input and Output Impedance

Schematic

	1st Mixer
Mix1 In			Mix1 Out
RPI	CPI	CPO	RPO

Unit	Output Impedance
B IP3 = <0> (Set Low)	304 Ω // 3.7 pF
B IP3 = <1> (Set High)	300 Ω // 4.0 pF

Figures 13, 14, and 16 represent the input and output impedance for the first mixer. Notice that the input single±ended and differential impedances are basically the same. The output impedance as described in Figure 14 will be used to match to a ceramic or crystal filter's input impedance. A typical ceramic filter input impedance is 330 Ω while crystal filter input impedance is usually 1500 Ω. Exact impedance matching to ceramic filters are not critical, however, more attention needs to be given to the filter characteristics of a crystal filter. Crystal filters are much narrower. It is important to accurately match to these filters to guaranty a reasonable response.

To find the IF bandwidth response of the first mixer refer to Figure 22. The ±3.0 dB bandwidth point is approximately 13 MHz. Figure 15 is a summary of the first mixer feedthrough parameters.

Figure 15. First Mixer Feedthrough Parameters

Parameter	(dBm)
1st LO Feedthrough @ Mix1 In1	±70.0
1st LO Feedthrough @ Mix1 Out	±55.5
RF Feedthrough @ Mix1 Out with ±30 dBm	±61.0

Figure 16. First Mixer Input Impedance over Input Frequency

	US Center Channels		France Center Channels
Unit	49 MHz	46 MHz	41 MHz	26 MHz
Single±Ended	1550 Ω // 3.7 pF	1560 Ω // 3.7 pF	1570 Ω // 3.8 pF	1650 Ω // 3.7 pF
Differential	1600 Ω // 1.8 pF	1610 Ω // 1.8 pF	1670 Ω // 1.8 pF	1710 Ω // 1.8 pF

Note: 11. Single±Ended data is from measured results. Differential data is from simulated results.

20	MOTOROLA ANALOG IC DEVICE DATA

MC13110A/B MC13111A/B

FIRST MIXER

Figure 17. First Mixer Voltage Conversion

Figure 18. First Mixer Voltage Conversion

		14		Gain, IP3_bit = 0						14
	GAIN (dB)	12							GAIN (dB)
, VOLTAGE								, VOLTAGE		12
		10	VCC = 3.6 V
		8.0	IF = 10.695 MHz, 330 Ω							10
gain1	CONVERSION	6.0						gain1	CONVERSION
MX								MX
										8.0
		4.0
		2.0	±35	±30	±25	±20	±15	±10		6.0
		±40								±40

Gain, IP3_bit = 1

VCC = 3.6 V

IF = 10.695 MHz, 330 Ω

±35

±30

±25

±20

±15

±10

Mix1 In, MIXER INPUT LEVEL (dBm)

Mix1 In, MIXER INPUT LEVEL (dBm)

Figure 19. First Mixer Output Level and

Figure 20. First Mixer Output Level and

Intermodulation, IP3_bit = 0

Intermodulation, IP3_bit = 1

(dBm)

0

(dBm)

0

±20

Fundamental Level

±20

Fundamental Level

OUTPUT

3rd Order

OUTPUT

±40

Intermodulation

±40

3rd Order

MIXER

MIXER

Intermodulation

±60

±60

Out,

VCC = 3.6 V

Out,

VCC = 3.6 V

1

±80

1

±80

Mix

IF = 10.695 MHz, 330 Ω

Mix

IF = 10.695 MHz, 330 Ω

±100

±35

±30

±25

±20

±15

±10

±100

±35

±30

±25

±20

±15

±10

±40

±40

Mix1 In, MIXER INPUT LEVEL (dBm)

Mix1 In, MIXER INPUT LEVEL (dBm)

Figure 21. First Mixer Compression versus

Figure 22. First IF Bandwidth

Supply Voltage

		±10												15
	VOLTAGE COMPRESSION (dBm)	±12							IP3_bit = 1					10
													CONVERSION GAIN (dB)
dB		±14										VOLTAGE,		5.0
,1.0
								IF = 10.695 MHz, 330 Ω
1		±16												0
1.0dBMix		±18										gain1		±5.0
O												MX
V		±20							IP3_bit = 0					±10
		±22	3.0	3.3	3.6	3.9	4.2	4.5	4.8	5.1	5.4			±15
		2.7												1.0
				VCC Audio, AUDIO SUPPLY VOLTAGE (V)

VCC = 3.6 V

RL = 330 Ω

LO = 36.075 MHz

10

100

f, IF FREQUENCY (MHz)

MOTOROLA ANALOG IC DEVICE DATA	21