Analog Devices MAT03EH, MAT03FH Datasheet

a		Low Noise, Matched
		Dual PNP Transistor
		MAT03
	FEATURES	PIN CONNECTION
	Dual Matched PNP Transistor	TO-78
	Low Offset Voltage: 100 V Max
		(H Suffix)
	Low Noise: 1 nV/√Hz @ 1 kHz Max
	High Gain: 100 Min
	High Gain Bandwidth: 190 MHz Typ
	Tight Gain Matching: 3% Max
	Excellent Logarithmic Conformance: rBE 0.3 typ

GENERAL DESCRIPTION

The MAT03 dual monolithic PNP transistor offers excellent parametric matching and high frequency performance. Low noise characteristics (1 nV/√Hz max @ 1 kHz), high bandwidth (190 MHz typical), and low offset voltage (100 µV max), makes the MAT03 an excellent choice for demanding preamplifier applications. Tight current gain matching (3% max mismatch) and high current gain (100 min), over a wide range of collector current, makes the MAT03 an excellent choice for current mirrors. A low value of bulk resistance (typically 0.3 Ω) also makes the MAT03 an ideal component for applications requiring accurate logarithmic conformance.

Each transistor is individually tested to data sheet specifications. Device performance is guaranteed at 25°C and over the extended industrial and military temperature ranges. To ensure the longterm stability of the matching parameters, internal protection diodes across the base-emitter junction clamp any reverse baseemitter junction potential. This prevents a base-emitter breakdown condition that can result in degradation of gain and matching performance due to excessive breakdown current.

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MAT03–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS (@ TA = 25 C, unless otherwise noted.)

					MAT03E			MAT03F
Parameter	Symbol	Conditions		Min	Typ	Max	Min	Typ	Max	Unit
Current Gain1	hFE	VCB =	0 V, –36 V
		IC = 1 mA		100	165		80	165
		IC = 100 µA		90	150		70	150
		IC = 10 µA		80	120		60	120
Current Gain Matching2	DhFE	IC = 100 µA,VCB = 0 V			0.5	3		0.5	6	%
Offset Voltage3	VOS	VCB =	0 V, IC = 100 µA		40	100		40	200	µV
Offset Voltage Change	∆VOS/∆VCB	IC = 100 µA								µV
vs. Collector Voltage		VCB1 = 0 V			11	150		11	200
		VCB2 = –36 V			11	150		11	200	µV
Offset Voltage Change	∆VOS/∆IC	VCB =	0 V		12	50		12	75	µV
vs. Collector Current		IC1 = 10 µA, IC2 = 1 mA			12	50		12	75	µV
Bulk Resistance	rBE	VCB =	0 V		0.3	0.75		0.3	0.75	Ω
		10 µA ≤ IC ≤ 1 mA			0.3	0.75		0.3	0.75	Ω
Offset Current	IOS	IC = 100 µA, VCB = 0 V			6	35		6	45	nA
Collector-Base		VCB = –36 V = VMAX			50	200		50	400	pA
Leakage Current	ICB0
Noise Voltage Density4	eN	IC = 1 mA, VCB = 0								nV/÷ Hz
		fO = 10 Hz			0.8			0.8
		fO = 100 Hz			0.7			0.7		nV/÷ Hz
		fO = 1 kHz			0.7			0.7		nV/÷ Hz
Collector Saturation		fO = 10 kHz			0.7			0.7		nV/÷ Hz
		IC = 1 mA, IB = 100 µA
Voltage	VCE(SAT)				0.025	0.1		0.025	0.1	V

ELECTRICAL CHARACTERISTICS (@ –40 C ≤ TA ≤ 85 C, unless otherwise noted.)

MAT03E

MAT03F

Parameter

Symbol

Conditions

Min

Typ

Max

Min

Typ

Max

Unit

Current Gain

hFE

VCB = 0 V, –36 V

IC = 1 mA

70

120

60

120

IC = 100 A

60

105

50

105

IC = 10 A

50

90

40

90

V

Offset Voltage

VOS

IC = 100 A, VCB = 0 V

30

135

30

265

Offset Voltage Drift5

TCVOS

IC = 100 A, VCB = 0 V

0.3

0.5

0.3

1.0

V/°C

Offset Current

IOS

IC = 100 A, VCB = 0 V

10

85

10

200

nA

Breakdown Voltage

BVCEO

36

36

V

NOTES

1Current gain is measured at collector-base voltages (VCB) swept from 0 to VMAX at indicated collector current. Typicals are measured at VCB = 0 V.

100 ( ∆IB ) hFE (min )

2Current gain matching (∆hFE) is defined as: ∆hFE =

.

IC1

IC

KT

3Offset voltage is defined as: VOS = VBE1 – VBE2, where

VOS is the differential voltage for IC1

= IC2: VOS = VBE1 – VBE2 =

In

.

q

IC2

4Sample tested. Noise tested and specified as equivalent input voltage for each transistor. 5Guaranteed by VOS test (TCVOS = VOS/T for VOS VBE) where T = 298°K for TA = 25°C. Specifications subject to change without notice.

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MAT03

ORDERING GUIDE

	VOS max	Temperature	Package
Model	(TA = +25 C)	Range	Option
MAT03EH	100 V	–40°C to +85°C	TO-78
MAT03FH	200 V	–40°C to +85°C	TO-78

ABSOLUTE MAXIMUM RATINGS1
Collector-Base Voltage (BVCBO) . . . . . . . . . .	. . . . . . . . . 36 V
Collector-Emitter Voltage (BVCEO) . . . . . . . .	. . . . . . . . . 36 V
Collector-Collector Voltage (BVCC) . . . . . . . .	. . . . . . . . . 36 V
Emitter-Emitter Voltage (BVEE) . . . . . . . . . .	. . . . . . . . . 36 V
Collector Current (IC) . . . . . . . . . . . . . . . . . .	. . . . . . . . 20 mA
Emitter Current (IE) . . . . . . . . . . . . . . . . . . .	. . . . . . . . 20 mA
Total Power Dissipation
Ambient Temperature ≤ 70°C2 . . . . . . . . .	. . . . . . 500 mW
Operating Temperature Range	–40°C to +85°C
MAT03E/F . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature . . . . . . . . .	–55°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . .	–65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . .	. . . . . . . . 300°C
Junction Temperature . . . . . . . . . . . . . . . . .	–65°C to +150°C

NOTES

1Absolute maximum ratings apply to both DICE and packaged devices.

2Rating applies to TO-78 not using a heat sink and LCC; devices in free air only. For TO-78, derate linearly at 6.3 mW/°C above 70°C ambient temperature; for LCC, derate at 7.8 mW/°C.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the MAT03 features propriety ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

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MAT03–Typical Performance Characteristics

TPC 1. Current Gain vs.	TPC 2. Current Gain	TPC 3. Gain Bandwidth vs.
Collector Current	vs. Temperature	Collector Current

TPC 4. Base-Emitter Voltage	TPC 5. Small-Signal Input Resistance
vs. Collector Current	(hie) vs. Collector Current

TPC 6. Small Signal Output Conductance (hoe) vs. Collector Current

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