Analog Devices OP471EY, OP471GS, OP471GP, OP471FY Datasheet

a High Speed,OperationalLow NoiseAmplifierQuad

OP471

FEATURES

Excellent Speed: 8 V/ s Typ

Low Noise: 11 nV/ Hz @ 1 kHz Max

Unity-Gain Stable

High Gain Bandwidth: 6.5 MHz Typ

Low Input Offset Voltage: 0.8 mV Max

Low Offset Voltage Drift: 4 V/ C Max

High Gain: 500 V/mV Min

Outstanding CMR: 105 dB Min

Industry Standard Quad Pinouts

GENERAL DESCRIPTION

The OP471 is a monolithic quad op amp featuring low noise, 11 nV/ Hz Max @ 1 kHz, excellent speed, 8 V/μs typical, a gain bandwidth of 6.5 MHz, and unity-gain stability.

The OP471 has an input offset voltage under 0.8 mV and an input offset voltage drift below 4 μV/∞C, guaranteed over the full military temperature range. Open-loop gain of the OP471 is over 500,000 into a 10 kΩ load ensuring outstanding gain accuracy and linearity. The input bias current is under 25 nA limiting errors due to signal source resistance. The OP471’s CMR of over 105 dB and PSRR of under 5.6 μV/V significantly reduce errors caused by ground noise and power supply fluctuations.

The OP471 offers excellent amplifier matching which is important for applications such as multiple gain blocks, low-noise instrumentation amplifiers, quad buffers and low-noise active filters.

The OP471 conforms to the industry standard 14-lead DIP pinout. It is pin-compatible with the LM148/LM149, HA4741, RM4156, MC33074, TL084 and TL074 quad op amps and can be used to upgrade systems using these devices.

For applications requiring even lower voltage noise the OP470 with a voltage density of 5 nV/ Hz Max @ 1 kHz is recommended.

PIN CONFIGURATIONS

14-Lead	14-Lead
Hermetic Dip	Plastic Dip
(Y-Suffix)	(P-Suffix)

OUT A	1		14	OUT D
ñIN A	2		13	ñIN D
+IN A	3		12	+IN D
V+	4	OP471	11	Vñ
+IN B	5		10	+IN C
ñIN B	6		9	ñIN C
OUT B	7		8	OUT C

OUT A	1		14	OUT D
ñIN A	2		13	ñIN D
+IN A	3		12	+IN D
V+	4	OP471	11	Vñ
+IN B	5		10	+IN C
ñIN B	6		9	ñIN C
OUT B	7		8	OUT C

	16-Lead SOIC
		(S-Suffix)
OUT A	1		16	OUT D
ñIN A	2		15	ñIN D
+IN A	3		14	+IN D
V+	4	OP471	13	Vñ
+IN B	5		12	+IN C
ñIN B	6		11	ñIN C
OUT B	7		10	OUT C
NC	8		9	NC
	NC = NO CONNECT

	V+
	BIAS
	OUT
ñIN	+IN

Vñ

Figure 1. Simplified Schematic

REV. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

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Tel: [phone]	www.analog.com
Fax: [phone]	© Analog Devices, Inc., 2002

OP471–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS (@ VS = 15 V, TA = 25 C, unless otherwise noted.)

				OP471E		OP471F			OP471G
Parameter	Symbol	Conditions	Min	Typ	Max	Min	Typ	Max	Min	Typ	Max	Unit
Input Offset Voltage	VOS			0.25	0.8		0.5	1.5		1.0	1.8	mV
Input Offset Current	IOS	VCM = 0 V		4	10		7	20		12	30	nA
Input Bias Current	IB	VCM = 0 V		7	25		15	50		25	60	nA
Input Noise Voltage1	en p-p	0.1 Hz to 10 Hz		250	500		250	500		250	500	nV p–p
Input Noise	en	fO = 10 Hz		9	16		9	16		9	16	nV/ Hz
Voltage Density2		fO = 100 Hz		7	12		7	12		7	12	nV/ Hz
		fO = 1 kHz		6.5	11		6.5	11		6.5	11	nV/ Hz
Input Noise	in	fO = 10 Hz		1.7			1.7			1.7		pA Hz
Current Density		fO = 100 Hz		0.7			0.7			0 7		pA Hz
		fO = 1 kHz		0.4			0.4			0.4		pA Hz
Large-Signal	AVO	V = ±10 V
Voltage Gain		RL = 10 kΩ	500	700		300	500		300	500		V/mV
		RL = 2 kΩ	350	550		175	275		175	275		V/mV
Input Voltage Range3	IVR		±11	±12		±11	±12		±11	±12		V
Output Voltage Swing	VO	RL ≥ 2 kΩ	±12	±13		±12	±13		±12	±13		V
Common-Mode	CMR	VCM = ±11 V	105	120		95	115		95	115		dB
Rejection
Power Supply	PSRR	VS = 4.5 V to 18 V		1	5.6		5.6	17.8		5.6	17.8	μV/V
Rejection Ratio
Slew Rate	SR		6.5	8		6.5	8		6.5	8		V/μs
Supply Current	ISY	No Load		9.2	11		9.2	11		9.2	11	mA
(All Amplifiers)
Gain Bandwidth	GBW	Av = 10		6.5			6.5			6.5		MHz
Product
Channel Separation1	CS	VO = 20 V p-p	125	150		125	150		125	150		dB
		fO = 10 Hz
Input Capacitance	CIN			2.6			2.6			2.6		pF
Input Resistance	RIN			1.1			1.1			1.1		MΩ
Differential-Mode
Input Resistance	RINCM			11			11			11		GΩ
Common-Mode
Settling Time	tS	AV = 1										μs
		To 0.1%		4.5			4.5			4.5
		To 0.01 %		7.5			7.5			7.5		μs

NOTES

1Guaranteed but not 100% tested.

2Sample tested.

3Guaranteed by CMR test.

–2–

REV. A

												OP471
		(Vs = ±15 V, –25 C ≤ TA ≤ 85 C for OP471E/F, –40 C ≤ TA ≤ 85 for OP471G,
ELECTRICAL CHARACTERISTICS unless otherwise noted.)
				OP471E			OP471F			OP471G
Parameter	Symbol	Conditions	Min	Typ	Max	Min	Typ	Max	Min	Typ	Max		Unit
Input Offset Voltage	VOS			0.3	1.1		0.6	2.0		1.2	2.5		mV
Average Input	TCVOS			1	4		2	7		4			μV/∞C
Offset Voltage Drift
Input Offset Current	los	VCM = 0 V		5	20		8	40		20	50		nA
Input Bias Current	IB	VCM = 0 V		13	50		25	70		40	75		nA
Large-Signal		VO = ±10 V
Voltage Gain	Avo	RL = 10 kΩ	375	600		200	400		200	400			V/mV
		RL = 2 kΩ	250	400		125	200		125	200
Input Voltage Range*	IVR		±11	±12		±11	±12		±11	±12			V
Output Voltage Swing	VO	RL ≥ 2 kΩ	±12	±13		±12	±13		±12	±13			V
Common-Mode	CMR	VCM = ±11 V	100	115		90	110		90	110			dB
Rejection
Power Supply	PSRR	VS = ±4.5 V to ±18 V		3.2	10		18	31.6		18	31.6		μV/V
Rejection Ratio
Supply Current
(All Amplifiers)	ISY	No Load		9.3	11		9.3	11		9.3	11		mA

*Guaranteed by CMR test.

ABSOLUTE MAXIMUM RATINGS1	±18 V
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . .
Differential Input Voltage2 . . . . . . . . . . . . . . .	. . . . . . . ±1.0 V
Differential Input Current2 . . . . . . . . . . . . . .	. . . . . . ±25 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . .	. Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . .	. . . . Continuous
Storage Temperature Range	–65∞C to +150∞C
P, Y-Package . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature Range (Soldering, 60 sec)	. . . . . . . . 300∞C
Junction Temperature (Ti) . . . . . . . . . . . . .	–65∞C to +150∞C
Operating Temperature Range	–25∞C to +85∞C
OP471E, OP471F . . . . . . . . . . . . . . . . . . .
OP471G . . . . . . . . . . . . . . . . . . . . . . . . . . .	–40∞C to +85∞C

NOTES

1Absolute Maximum Ratings apply to packaged parts, unless otherwise noted. 2The OP471’s inputs are protected by back-to-back diodes. Current limiting

resistors are not used in order to achieve low noise performance. If differential voltage exceeds ±1.0 V, the input current should be limited to ±25 mA.

Package Type	JA*	JC	Unit
14-Lead Hermetic DIP(Y)	94	10	∞C/W
14-Lead Plastic DIP(P)	76	33	∞C/W
16-Lead SOIC (S)	88	23	∞C/W

* JA is specified for worst-case mounting conditions, i.e., JA is specified for device in socket for TO, CERDIP, PDIP packages; JA is specified for device soldered to printed circuit board for SO packages.

ORDERING GUIDE

TA = 25∞C	Package Options		Operating
VOS MAX			Temperature
(μV)	14-Lead CERDIP	Plastic	Range
800	OP471EY		IND
1,500	OP471FY*		IND
1,800		OP471GP	XIND
1,800		OP471GS	XIND

*Not for new design. Obsolete April 2002.

For military processed devices, please refer to the standard microcircuit drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp

5962-88565022A - OP471ARCMDA

5962-88565023A - OP471ATCMDA

5962-8856502CA - OP471AYMDA

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP471 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. A

–3–

OP471–Typical Performance Characteristics

	100					10	TA = 25 C
		TA = 25 C						AT 10Hz
		VS = 15V
Hz	40				Hz
	30					8
nV/	20				nV/			AT 1kHz
ñ					ñ
NOISE	10				NOISE	6
VOLTAGE	3	I/F CORNER = 5Hz			VOLTAGE	4
	5
	4
	2
	1					2		10	15
	1	10	100	1k		0	5			20

FREQUENCY ñ Hz	SUPPLY VOLTAGE ñ V
TPC 1. Voltage Noise Density	TPC 2. Voltage Noise Density
vs. Frequency	vs. Supply Voltage

	100					400
		TA = 25 C					VS = 15V
		VS = 15V			V
VOLTAGE NOISE ñ nV/ Hz	40					300
	30				INPUT OFFSET VOLTAGE ñ
	20
	10					200
	5
	4					100
	3	I/F CORNER = 5Hz
	2
	1					0
	1	10	100	1k		ñ75	ñ50	ñ25	0	25	50	75	100	125
		FREQUENCY ñ Hz						TEMPERATURE ñ C

TPC 4. Current Noise Density vs. Frequency

	20
													VS = 15V
													VCM = 0V
nA	15
CURRENT ñ
	10
BIAS
INPUT	5
	0
			ñ50		ñ25		0		25		50		75		100		125
	ñ75

TEMPERATURE ñ C

TPC 5. Input Offset Voltage vs. Temperature

	10
	9		VS = 15V
nA			VCM = 0V
	8
ñ
CURRENT	7
	6
OFFSET	5
	4
INPUT	3
	2
	1
	0
	ñ75		ñ50		ñ25		0		25		50		75		100		125

TEMPERATURE ñ C

TPC 7. Input Bias Current vs.	TPC 8. Input Offset Current vs.
Temperature	Temperature

VOLTAGE – 100nV/DIV	5mV	1s
	100
	90
NOISE	10
	0%	TA = 25 C
		VS = 15V

0

2

4

6

8

10

TIME – Seconds

TPC 3. 0.1 Hz to 10 Hz Noise

	20
V	18				TA = 25 C
					VS = 15V
ñ	16
VOLTAGE
	12
OFFSET	14
	8
IN	10
	6
CHANGE
	4
	2
	0
					1				2		3		4		5
	0
									TIME ñ Minutes
					TPC 6. Warm-Up Offset
					Voltage Drift
	10
					TA = 25 C
					VS = 15V
ñ nA	9
CURRENT	8
INPUTBIAS	6
	7
	5
					ñ7.5				ñ2.5		2.5		7.5		12.5
	ñ12.5

COMMON-MODE VOLTAGE ñ V

TPC 9. Input Bias Current vs. Common-Mode Voltage

–4–

REV. A

	130
														TA = 25 C
	120
														VS = 15V
	110
	100
dB	90
	80
ñ	70
CMR
	60
	50
	40
	30
	20
	10
			10		100		1k				10k					100k			1M
	1
					FREQUENCY ñ Hz
			TPC 10. CMR vs. Frequency
	140
	130													TA = 25 C
	120													VS = 15V
	110
	100
dB	90
	80
										ñPSR
ñ	70
PSR
	60
	50						+PSR
	40
	30
	20
	10

0

110 100 1k 10k 100k 1M 10M 100M

FREQUENCY ñ Hz

TPC 13. PSR vs. Frequency

		10
						TA = +25 C
ñ mA
		8					TA = +125 C
CURRENT
		6						TA = ñ55 C
SUPPLY
TOTAL		4
		2
				5		10				15				20
		0
					SUPPLY VOLTAGE ñ V
				TPC 11. Total Supply Current
				vs. Supply Voltage
	140
	130									TA = 25 C
	120									VS = 15V
dB	110
	100
ñ
		90
GAIN
		80
LOOP-		70
		60
OPEN		50
		40
		30
		20
		10

0

110 100 1k 10k 100k 1M 10M 100M

FREQUENCY ñ Hz

TPC 14. Open-Loop Gain vs. Frequency

	25					80			2000
					TA = 25 C					TA = 25 C
LOOP-OPENGAIN ñ dB	20				VS = 15V	100	DegreesñSHIFTPHASE	LOOP-OPENGAIN ñ V/mV		RL = 10k
		PHASE							500
	15					120
	10					140
		GAIN			PHASE MARGIN				1000
	5				= 57	160
	0					180
	ñ5					200
	ñ10					220			0	5	10	15	20
		1	2	3	4 5 6 7 8 9 10				0
			FREQUENCY ñ MHz							SUPPLY VOLTAGE ñ V

TPC 16. Open-Loop Gain,	TPC 17. Open-Loop Gain vs.
Phase Shift vs. Frequency	Supply Voltage

OP471

	10
	9		VS = 15V
ñ mA
	8
CURRENT
	7
SUPPLY	6
	5
TOTAL
	4
	3

2 ñ75 ñ50 ñ25 0 25 50 75 100 125

TEMPERATURE ñ C

TPC 12. Total Supply Current vs. Temperature

	80			TA = 25 C
				VS = 15V
ñ dB	60
GAINLOOP-	40
CLOSED	20
	0
	ñ20	10k	100k	1M	10M
	1k

FREQUENCY ñ Hz

TPC 15. Closed-Loop Gain vs. Frequency

	80									8
								VS = 15V		MHz
					GBW
PHASE MARGIN ñ Degrees
	70									6
	60									4
	50									2
										PRODUCTBANDWIDTHGAIN-ñ
	40									0
	ñ75	ñ50	ñ25	0	25	50	75	100	125	150
				TEMPERATURE ñ C

TPC 18. Gain-Bandwidth Product, Phase Margin vs. Temperature

REV. A

–5–