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Ultraprecision |
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Operational Amplifier |
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OP177 |
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Ultralow Offset Voltage:
TA = 25 C: 25 V Max
Outstanding Offset Voltage Drift: 0.1 V/ C Max
Excellent Open-Loop Gain and Gain Linearity:
12 V/ V Typ
CMRR: 130 dB Min
PSRR: 115 dB Min
Low Supply Current: 2.0 mA Max
Fits Industry Standard Precision Op Amp Sockets
(OP07/OP77)
PIN CONNECTIONS
Epoxy Mini-DIP
(P Suffix)
8-Pin SO (S-Suffix)
V |
TRIM |
1 |
8 |
V |
TRIM |
OS |
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OS |
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–IN |
2 |
7 |
V+ |
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+IN |
3 |
6 |
OUT |
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V– |
4 |
5 |
NC |
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NC = NO CONNECT
GENERAL DESCRIPTION
The OP177 features the highest precision performance of any op amp currently available. Offset voltage of the OP177 is only 25 V max at room temperature. The ultralow VOS of the OP177 combines with its exceptional offset voltage drift (TCVOS) of 0.1 V/°C max to eliminate the need for external VOS adjustment and increases system accuracy over temperature.
The OP177’s open-loop gain of 12 V/ V is maintained over the full ±10 V output range. CMRR of 130 dB min, PSRR of
120 dB min, and maximum supply current of 2 mA are just a few examples of the excellent performance of this operational amplifier. The OP177’s combination of outstanding specifications ensures accurate performance in high closed-loop gain applications.
This low noise bipolar input op amp is also a cost effective alternative to chopper-stabilized amplifiers. The OP177 provides chopper-type performance without the usual problems of high noise, low frequency chopper spikes, large physical size, limited common-mode input voltage range, and bulky external storage capacitors.
The OP177 is offered in the –40°C to +85°C extended industrial temperature ranges. This product is available in 8-pin epoxy DIPs, as well as the space saving 8-pin SmallOutline (SO).
V+ |
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R2A* |
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(OPTIONA |
R2B* |
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L |
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C1 |
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R7 |
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NULL) |
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R1A |
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R1B |
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2B |
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Q19 |
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Q9 |
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Q10 |
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Q7 |
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Q8 |
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Q11 |
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R9 |
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Q5 |
Q3 |
Q6 |
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Q4 |
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OUTPUT |
NONINVERTING |
R3 |
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Q27 |
C3 |
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Q17 |
R10 |
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Q16 |
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INPUT |
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Q1 |
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Q26 |
R5 |
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Q21 |
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Q20 |
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Q23 |
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Q25 |
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R4 |
Q22 |
Q24 |
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INVERTING |
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Q2 |
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Q15 |
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INPUT |
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Q18 |
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Q14 |
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Q13 |
R6 |
R8 |
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V– |
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*NOTE: |
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R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY. |
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Figure 1. Simplified Schematic
REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 |
www.analog.com |
Fax: 781/326-8703 |
© Analog Devices, Inc., 2002 |
ELECTRICAL CHARACTERISTICS (@ VS = 15 V, TA = 25 C, unless otherwise noted.) |
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OP177 |
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OP177F |
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OP177G |
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Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Min |
Typ |
Max |
Unit |
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INPUT OFFSET |
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µV |
VOLTAGE |
VOS |
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10 |
25 |
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20 |
60 |
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LONG-TERM |
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INPUT OFFSET |
∆VOS/Time |
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µV/Mo |
Voltage Stability |
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0.3 |
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0.4 |
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INPUT OFFSET1 |
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CURRENT |
IOS |
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0.3 |
1.5 |
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0.3 |
2.8 |
nA |
INPUT BIAS |
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CURRENT |
IB |
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–0.2 |
1.2 |
2 |
–0.2 |
1.2 |
2.8 |
nA |
INPUT NOISE |
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fo = 1 Hz to 100 Hz2 |
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VOLTAGE |
en |
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118 |
150 |
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118 |
150 |
nV rms |
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INPUT NOISE |
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fo = 1 Hz to 100 Hz2 |
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CURRENT |
in |
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3 |
8 |
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3 |
8 |
pA rms |
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INPUT |
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RESISTANCE |
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Differential- |
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MΩ |
Mode3 |
RIN |
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26 |
45 |
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18.5 |
45 |
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INPUT |
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RESISTANCE |
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GΩ |
COMMON-MODE |
RINCM |
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200 |
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200 |
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INPUT VOLTAGE |
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±13 |
± 14 |
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± 13 |
± 14 |
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RANGE4 |
IVR |
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V |
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COMMON-MODE |
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REJECTION |
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VCM = ±13 V |
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RATIO |
CMRR |
130 |
140 |
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115 |
140 |
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dB |
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POWER SUPPLY |
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REJECTION |
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VS = ±3 V to ± 18 V |
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RATIO |
PSRR |
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115 |
125 |
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110 |
120 |
dB |
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LARGE SIGNAL |
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RL 2 kΩ, |
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VOLTAGE GAIN |
AVO |
5000 |
12000 |
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2000 |
6000 |
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V/mV |
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VO = 610 V5 |
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OUTPUT |
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VOLTAGE |
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RL 10 kΩ |
±13.5 |
± 14.0 |
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± 13.5 |
± 14.0 |
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SWING |
VO |
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V |
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RL 2 kΩ |
±12.5 |
± 13.0 |
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± 12.5 |
± 13.0 |
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V |
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RL 1 kΩ |
±12.0 |
± 12.5 |
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± 12.0 |
± 12.5 |
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V |
SLEW RATE2 |
SR |
RL 2 kΩ |
0.1 |
0.3 |
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0.1 |
0.3 |
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V/µs |
CLOSED-LOOP |
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BANDWIDTH2 |
BW |
AVCL = 1 |
0.4 |
0.6 |
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0.4 |
0.6 |
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OPEN-LOOP |
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OUTPUT |
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Ω |
RESISTANCE |
RO |
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60 |
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60 |
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REV. C |
–2– |
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OP177 |
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POWER |
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VS = ±15 V, |
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CONSUMPTION |
PD |
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No Load |
50 |
60 |
50 |
60 |
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mW |
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Vs = ±3 V, |
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No Load |
3.5 |
4.5 |
3.5 |
4.5 |
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mW |
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SUPPLY |
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VS = ±15 V, |
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CURRENT |
ISY |
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No Load |
1.6 |
2 |
1.6 |
2 |
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mA |
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OFFSET |
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ADJUSTMENT |
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RP = 20 kΩ |
± 3 |
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± 3 |
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RANGE |
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NOTES
1Long-Term Input Offset Voltage Stability refers to the averaged trend line of VOS versus time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in VOS during the first 30 operating days are typically less than 2.0 V.
2Sample tested.
3Guaranteed by design.
4Guaranteed by CMRR test condition.
5To ensure high open-loop gain throughout the ± 10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.
Specifications subject to change without notice.
REV. C |
–3– |
OP177–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ VS = 15 V, –40 C ≤ TA ≤ 85 C, unless otherwise noted.)
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OP177F |
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OP177G |
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Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Min |
Typ |
Max |
Unit |
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INPUT OFFSET VOLTAGE |
VOS |
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15 |
40 |
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20 |
100 |
µV |
AVERAGE INPUT OFFSET |
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µV/°C |
VOLTAGE DRIFT1 |
TCVOS |
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0.1 |
0.3 |
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0.7 |
1.2 |
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INPUT OFFSET CURRENT |
IOS |
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0.5 |
2.2 |
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0.5 |
4.5 |
nA |
AVERAGE INPUT OFFSET |
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pA/°C |
CURRENT DRIFT2 |
TCIOS |
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1.5 |
40 |
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1.5 |
85 |
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INPUT BIAS CURRENT |
IB |
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–0.2 |
2.4 |
4 |
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2.4 |
± 6 |
nA |
AVERAGE INPUT BIAS |
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pA/°C |
CURRENT DRIFT2 |
TCIB |
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8 |
40 |
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15 |
60 |
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INPUT VOLTAGE RANGE3 |
IVR |
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± 13 |
± 13.5 |
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±13 |
± 13.5 |
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V |
COMMON-MODE |
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VCM = ± 13 V |
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REJECTION RATIO |
CMRR |
120 |
140 |
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110 |
140 |
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dB |
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POWER SUPPLY |
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VS = ±3 V to ±18 V |
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REJECTION RATIO |
PSSR |
110 |
120 |
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106 |
115 |
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dB |
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LARGE-SIGNAL |
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RL 2 kΩ, VO = 10 V |
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VOLTAGE GAIN4 |
AVO |
2000 |
6000 |
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1000 |
4000 |
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V/mV |
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OUTPUT VOLTAGE SWING |
VO |
RL 2/kΩ |
± 12 |
± 13 |
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±12 |
± 13 |
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V |
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POWER CONSUMPTION |
PD |
VS = ±15 V, No Load |
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60 |
75 |
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60 |
75 |
mW |
SUPPLY CURRENT |
ISY |
VS = ±15 V, No Load |
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20 |
2.5 |
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2 |
2.5 |
mA |
NOTES
1OP177TCVOS is sample tested.
2Guaranteed by endpoint limits.
3Guaranteed by CMRR test condition.
4To ensure high open-loop gain throughout the ± 10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.
Specifications subject to change without notice.
200k
50
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OP177 VO
+
VO VOS = 4000
Figure 2. Typical Offset Voltage Test Circuit
20k
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V+ |
– |
– |
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INPUT |
OP177 |
OUTPUT |
+ |
+ |
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VOS TRIM RANGE IS |
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TYPICALLY 3.0mV |
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V– |
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Figure 3. Optional Offset Nulling Circuit
–4– |
REV. C |