FEATURES
Integrated, isolated high-side supply 150 mW of secondary side power Isolated high-side and low-side outputs
100 mA output source current, 300 mA output sink current High common-mode transient immunity: >25 kV/μs
High temperature operation: 105°C Adjustable power level
Wide body 16-lead SOIC package
Safety and regulatory approvals (pending)
UL recognition: 2500 V rms for 1 minute per UL1577
Isolated Half-Bridge Driver with Integrated High-Side Supply ADuM5230
GENERAL DESCRIPTION
The ADuM52301 is an isolated half-bridge gate driver that employs Analog Devices, Inc.,i Coupler® technology to provide independent and isolated high-side and low-side outputs. Combining CMOS and microtransformer technologies, this isolation component contains an integrated dc-to-dc converter providing an isolated high-side supply. This eliminates the cost, space, and performance difficulties associated with external supply configurations such as a bootstrap circuitry. This highside isolated supply powers not only the ADuM5230 high-side output but also any external buffer circuitry used with the ADuM5230.
APPLICATIONS
MOSFET/IGBT gate drive Plasma display modules Motor drives
Power supplies Solar panel inverters
In comparison to gate drivers employing high voltage level translation methodologies, the ADuM5230 offers the benefit of true, galvanic isolation between the input and each output. Each output can operate up to ±700 VP relative to the input, thereby supporting low-side switching to negative voltages. The differential voltage between the high-side and low-side may be as high as 700 VP.
1Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; 7,075,329; other pending patents.
FUNCTIONAL BLOCK DIAGRAM
GND |
1 |
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16 |
V |
OA |
1 |
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ISOLATED |
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DC/DC |
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VDD1 |
2 |
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CONVERTER |
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15 |
VISO |
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VADJ |
3 |
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14 |
GND |
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ISO |
GND1 |
4 |
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13 |
NC |
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VIA |
5 |
╓ |
ENCODE |
DECODE |
╓ |
12 |
NC |
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╜ |
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╜ |
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V |
6 |
╓ |
ENCODE |
DECODE |
╓ |
11 |
GND |
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IB |
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╜ |
╜ |
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B |
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VDD1 |
7 |
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ADuM5230 |
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10 |
VDDB |
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GND |
8 |
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9 |
V |
OB |
1 |
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NC = NO CONNECT |
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07080001- |
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 |
www.analog.com |
Fax: 781.461.3113 |
©2008 Analog Devices, Inc. All rights reserved. |
ADuM5230
TABLE OF CONTENTS
Features .............................................................................................. |
1 |
Typical Perfomance Characteristics................................................ |
8 |
Applications....................................................................................... |
1 |
Applications Information .............................................................. |
10 |
General Description ......................................................................... |
1 |
Theory of Operation .................................................................. |
10 |
Functional Block Diagram .............................................................. |
1 |
PC Board Layout ........................................................................ |
10 |
Revision History ............................................................................... |
2 |
Thermal Analysis ....................................................................... |
10 |
Specifications..................................................................................... |
3 |
Propagation Delay-Related Parameters................................... |
11 |
Electrical Characteristics............................................................. |
3 |
DC Correctness and Magnetic Field Immunity........................... |
11 |
Package Characteristics ............................................................... |
5 |
Power Consumption .................................................................. |
12 |
Regulatory Information............................................................... |
5 |
Increasing and Decreasing Available Power............................... |
12 |
Insulation and Safety-Related Specifications............................ |
5 |
Common-Mode Transient Immunity ..................................... |
12 |
Recommended Operating Conditions ...................................... |
5 |
Typical Application Usage......................................................... |
13 |
Absolute Maximum Ratings............................................................ |
6 |
Insulation Lifetime..................................................................... |
13 |
ESD Caution.................................................................................. |
6 |
Outline Dimensions ....................................................................... |
15 |
Pin Configuration and Pin Function Descriptions...................... |
7 |
Ordering Guide .......................................................................... |
15 |
REVISION HISTORY
4/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADuM5230
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 12.0 ≤ VDDB ≤ 18.0 V. All min/max specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 5.0 V, VDDB = 15 V.
Table 1.
Parameter |
|
Symbol |
Min |
Typ |
Max |
Unit |
Test Conditions |
DC SPECIFICATIONS |
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Input Supply Current, Quiescent |
|
IDD1(Q) |
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125 |
mA |
IISO = 0 mA, dc signal inputs, |
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VADJ = open |
Channel B Supply Current, Quiescent |
|
IDDB(Q) |
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|
1.6 |
mA |
|
Channel A Output Supply Voltage |
|
VISO |
12 |
15 |
18.5 |
V |
|
At 100 kHz Switching Frequency |
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Maximum Channel A Output Supply Current |
|
IISO(max, 100) |
10 |
|
|
mA |
CL = 200 pF |
Input Supply Current |
|
IDD1 |
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|
200 |
mA |
IISO = IISO(max, 100) |
Channel B Supply Current |
|
IDDB |
|
|
1.8 |
mA |
CL = 200 pF |
At 1000 kHz Switching Frequency |
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Maximum Channel A Output Supply Current |
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IISO(max, 1000) |
7.5 |
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|
mA |
CL = 200 pF |
Input Supply Current |
|
IDD1 |
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|
200 |
mA |
IISO = IISO(max, 1000) |
Channel B Supply Current |
|
IDDB |
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|
7.5 |
mA |
CL = 200 pF |
Input Currents |
|
IIA, IIB |
−10 |
+0.01 |
+10 |
μA |
0 ≤ VIA, VIB ≤ 5.5 V |
Logic High Input Voltage |
|
VATH, VBTH |
0.7 × VDD1 |
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V |
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Logic Low Input Voltage |
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VATL, VBTL |
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0.3 × VDD1 |
V |
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Logic High Output Voltages |
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VOAH, VOBH |
VISO – 0.1, |
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VISO, VDDB |
V |
IOA, IOB = −1 mA |
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VDDB – 0.1 |
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Logic Low Output Voltages |
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VOAL, VOBL |
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0.1 |
V |
IOA, IOB = 1 mA |
Undervoltage Lockout, VISO and VDDB Supply |
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Positive-Going Threshold |
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VDDBUV+ |
8.0 |
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10.1 |
V |
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Negative-Going Threshold |
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VDDBUV− |
7.4 |
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9.0 |
V |
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Hysteresis |
V |
DDBUVH |
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0.9 |
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V |
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Undervoltage Lockout, VDD1 Supply |
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Positive-Going Threshold |
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VDD1UV+ |
3.5 |
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4.2 |
V |
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Negative-Going Threshold |
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VDD1UV− |
3.0 |
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3.9 |
V |
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Hysteresis |
V |
DD1UVH |
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0.4 |
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V |
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Output Short-Circuit Pulsed Current, Sourcing1 |
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IOA, IOB |
100 |
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mA |
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Output Short-Circuit Pulsed Current, Sinking1 |
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IOA, IOB |
300 |
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mA |
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SWITCHING SPECIFICATIONS |
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Minimum Pulse Width2 |
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PW |
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100 |
ns |
CL = 200 pF |
Maximum Switching Frequency3 |
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1 |
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MHz |
CL = 200 pF |
Propagation Delay4 |
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tPHL, tPLH |
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100 |
ns |
CL = 200 pF |
Change vs. Temperature |
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100 |
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ps/°C |
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Pulse Width Distortion, |tPLH − tPHL| |
PWD |
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8 |
ns |
CL = 200 pF |
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Channel-to-Channel Matching, Rising or Falling |
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tM2 |
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8 |
ns |
CL = 200 pF |
Matching Edge Polarity5 |
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Channel-to-Channel Matching, Rising vs. Falling |
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tM1 |
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10 |
ns |
CL = 200 pF |
Opposite Edge Polarity6 |
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Part-to-Part Matching, Rising or Falling Edges7 |
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55 |
ns |
CL = 200 pF |
Part-to-Part Matching, Rising vs. Falling Edges8 |
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63 |
ns |
CL = 200 pF |
Rev. 0 | Page 3 of 16
ADuM5230
Parameter |
Symbol |
Min |
Typ |
Max |
Unit |
Test Conditions |
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Common-Mode Transient Immunity |
|CMH| |
25 |
35 |
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kV/μs |
VIx = VDD1, VCM = 1000 V, |
at Logic High Output |
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transient magnitude = 800 V |
Common-Mode Transient Immunity |
|CML| |
25 |
35 |
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kV/μs |
VIx = 0 V, VCM = 1000 V, |
at Logic Low Output |
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transient magnitude = 800 V |
Output Rise Time (10% to 90%) |
tR |
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25 |
ns |
CL = 200 pF, IISO = 10 mA, |
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100 kHz switching frequency |
Output Fall Time (10% to 90%) |
tF |
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10 |
ns |
CL = 200 pF, IISO = 10 mA, |
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100 kHz switching frequency |
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1 Short-circuit duration is less than 1 sec. Average output current must conform to the limit shown under the Absolute Maximum Ratings section.
2 The minimum pulse width is the shortest pulse width at whichthe specified timing parameters are guaranteed. Operation below the minimum pulse width is strongly discouraged because in some instances pulse stretching to 1 μs may occur.
3The maximum switching frequency is the maximum signal frequency at which the specified timing and power conversion parameters are guaranteed. Operation above the maximum frequency is strongly discouraged.
4tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5In channel-to-channel matching, the rising or falling matching edge polarity is the magnitude of the propagation delay difference between two channels of the same part when both inputs are either both rising or falling edges. The loads on each channel are equal.
6 In channel-to-channel matching, the rising vs. falling opposite edge polarity is the magnitude of the propagation delay difference between two channels of the same part when one input is a rising edge and one input is a falling edge. The loads on each channel are equal.
7In part-to-part matching, the rising or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8In part-to-part matching, the rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
Rev. 0 | Page 4 of 16
ADuM5230
PACKAGE CHARACTERISTICS
Table 2.
Parameter |
Symbol |
Min Typ |
Max |
Unit |
Test Conditions |
Resistance (Input-to-Output)1 |
RI-O |
1012 |
|
Ω |
|
Capacitance (Input-to-Output)1 |
CI-O |
2.0 |
|
pF |
f = 1 MHz |
Input Capacitance |
CI |
4.0 |
|
pF |
|
IC Junction-to-Ambient Thermal Resistance |
θJA |
48 |
|
°C/W |
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1 The device is considered a two-terminal device: Pin 1 to Pin 8 are shorted together, and Pin 9 to Pin 16 are shorted together.
REGULATORY INFORMATION
The ADuM5230 will be approved by the organization listed in Table 3.
Table 3.
UL1 (pending)
Recognized under 1577 component recognition program, File E214100
1 In accordance with UL1577, each ADuM5230 is proof-tested by applying an insulation test voltage ≥3000 V rms for 1 sec (current leakage detection limit = 5 μA).
INSULATION AND SAFETY-RELATED SPECIFICATIONS |
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Table 4. |
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Parameter |
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Symbol |
Value |
Unit |
Conditions |
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Rated Dielectric Insulation Voltage |
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2500 |
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V rms |
1 minute duration |
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Minimum External Air Gap (Clearance) |
L(I01) |
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3.5 min |
mm |
Measured from input conductors to output conductors, |
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shortest distance through air |
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Minimum External Tracking (Creepage) |
L(I02) |
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3.5 min |
mm |
Measured from input conductors to output conductors, |
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shortest distance path along body |
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Minimum Internal Gap (Internal |
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0.017 min |
mm |
Distance through the insulation |
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Clearance) |
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Tracking Resistance (Comparative |
CTI |
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>175 |
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V |
DIN IEC 112/VDE 0303 Part 1 |
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Tracking Index) |
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Isolation Group |
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IIIa |
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Material Group (DIN VDE 0110, 1/89, Table 1) |
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600 |
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RECOMMENDED OPERATING CONDITIONS |
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(mA) |
500 |
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Table 5. |
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CURRENT |
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Parameter |
Value |
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400 |
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Operating Temperature (TA) |
−40°C to +105°C |
DD1 |
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Input Supply Voltage1 (VDD1) |
4.5 V to 5.5 V |
300 |
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Channel B Supply Voltage1 (VDDB) |
12 V to 18.5 V |
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V |
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OPERATING |
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Input Signal Rise and Fall Times |
1 ms |
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200 |
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Minimum VDD1 Power-On Slew Rate2 (PSLEW) |
400 V/ms |
SAFE |
100 |
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1 All voltages are relative to their respective ground. |
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2 The ADuM5230 power supply may fail to initialize properly if VDD1 is applied |
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too slowly. |
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0 |
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-010 |
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–40 |
0 |
40 |
80 |
120 |
160 |
200 |
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07080 |
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AMBIENT TEMPERATURE (°C) |
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Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on
Case Temperature, per DIN EN 60747-5-2
Rev. 0 | Page 5 of 16