Analog Devices EVAL-ADE7169F16EB, ADUM5230ARWZ, ADUM5230, ADE7100 Datasheet

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FEATURES

Integrated, isolated high-side supply 150 mW of secondary side power Isolated high-side and low-side outputs

100 mA output source current, 300 mA output sink current High common-mode transient immunity: >25 kV/μs

High temperature operation: 105°C Adjustable power level

Wide body 16-lead SOIC package

Safety and regulatory approvals (pending)

UL recognition: 2500 V rms for 1 minute per UL1577

Isolated Half-Bridge Driver with Integrated High-Side Supply ADuM5230

GENERAL DESCRIPTION

The ADuM52301 is an isolated half-bridge gate driver that employs Analog Devices, Inc.,i Coupler® technology to provide independent and isolated high-side and low-side outputs. Combining CMOS and microtransformer technologies, this isolation component contains an integrated dc-to-dc converter providing an isolated high-side supply. This eliminates the cost, space, and performance difficulties associated with external supply configurations such as a bootstrap circuitry. This highside isolated supply powers not only the ADuM5230 high-side output but also any external buffer circuitry used with the ADuM5230.

APPLICATIONS

MOSFET/IGBT gate drive Plasma display modules Motor drives

Power supplies Solar panel inverters

In comparison to gate drivers employing high voltage level translation methodologies, the ADuM5230 offers the benefit of true, galvanic isolation between the input and each output. Each output can operate up to ±700 VP relative to the input, thereby supporting low-side switching to negative voltages. The differential voltage between the high-side and low-side may be as high as 700 VP.

1Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; 7,075,329; other pending patents.

FUNCTIONAL BLOCK DIAGRAM

GND

1

 

 

 

 

16

V

OA

1

 

 

 

ISOLATED

 

 

 

 

 

 

 

DC/DC

 

 

 

 

VDD1

2

 

 

CONVERTER

 

15

VISO

 

 

 

 

VADJ

3

 

 

 

 

14

GND

 

 

 

 

 

 

 

 

ISO

GND1

4

 

 

 

 

13

NC

VIA

5

ENCODE

DECODE

12

NC

 

 

 

 

 

 

 

V

6

ENCODE

DECODE

11

GND

IB

 

 

 

B

VDD1

7

 

ADuM5230

 

 

10

VDDB

 

 

 

 

 

 

 

 

GND

8

 

 

 

 

9

V

OB

1

 

 

 

 

 

 

 

 

 

 

NC = NO CONNECT

 

 

 

07080001-

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.

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Tel: 781.329.4700

www.analog.com

Fax: 781.461.3113

©2008 Analog Devices, Inc. All rights reserved.

ADuM5230

TABLE OF CONTENTS

Features ..............................................................................................

1

Typical Perfomance Characteristics................................................

8

Applications.......................................................................................

1

Applications Information ..............................................................

10

General Description .........................................................................

1

Theory of Operation ..................................................................

10

Functional Block Diagram ..............................................................

1

PC Board Layout ........................................................................

10

Revision History ...............................................................................

2

Thermal Analysis .......................................................................

10

Specifications.....................................................................................

3

Propagation Delay-Related Parameters...................................

11

Electrical Characteristics.............................................................

3

DC Correctness and Magnetic Field Immunity...........................

11

Package Characteristics ...............................................................

5

Power Consumption ..................................................................

12

Regulatory Information...............................................................

5

Increasing and Decreasing Available Power...............................

12

Insulation and Safety-Related Specifications............................

5

Common-Mode Transient Immunity .....................................

12

Recommended Operating Conditions ......................................

5

Typical Application Usage.........................................................

13

Absolute Maximum Ratings............................................................

6

Insulation Lifetime.....................................................................

13

ESD Caution..................................................................................

6

Outline Dimensions .......................................................................

15

Pin Configuration and Pin Function Descriptions......................

7

Ordering Guide ..........................................................................

15

REVISION HISTORY

4/08—Revision 0: Initial Version

Rev. 0 | Page 2 of 16

ADuM5230

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 12.0 ≤ VDDB ≤ 18.0 V. All min/max specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 5.0 V, VDDB = 15 V.

Table 1.

Parameter

 

Symbol

Min

Typ

Max

Unit

Test Conditions

DC SPECIFICATIONS

 

 

 

 

 

 

 

Input Supply Current, Quiescent

 

IDD1(Q)

 

 

125

mA

IISO = 0 mA, dc signal inputs,

 

 

 

 

 

 

 

VADJ = open

Channel B Supply Current, Quiescent

 

IDDB(Q)

 

 

1.6

mA

 

Channel A Output Supply Voltage

 

VISO

12

15

18.5

V

 

At 100 kHz Switching Frequency

 

 

 

 

 

 

 

Maximum Channel A Output Supply Current

 

IISO(max, 100)

10

 

 

mA

CL = 200 pF

Input Supply Current

 

IDD1

 

 

200

mA

IISO = IISO(max, 100)

Channel B Supply Current

 

IDDB

 

 

1.8

mA

CL = 200 pF

At 1000 kHz Switching Frequency

 

 

 

 

 

 

 

Maximum Channel A Output Supply Current

 

IISO(max, 1000)

7.5

 

 

mA

CL = 200 pF

Input Supply Current

 

IDD1

 

 

200

mA

IISO = IISO(max, 1000)

Channel B Supply Current

 

IDDB

 

 

7.5

mA

CL = 200 pF

Input Currents

 

IIA, IIB

−10

+0.01

+10

μA

0 ≤ VIA, VIB ≤ 5.5 V

Logic High Input Voltage

 

VATH, VBTH

0.7 × VDD1

 

 

V

 

Logic Low Input Voltage

 

VATL, VBTL

 

 

0.3 × VDD1

V

 

Logic High Output Voltages

 

VOAH, VOBH

VISO – 0.1,

 

VISO, VDDB

V

IOA, IOB = −1 mA

 

 

 

VDDB – 0.1

 

 

 

 

Logic Low Output Voltages

 

VOAL, VOBL

 

 

0.1

V

IOA, IOB = 1 mA

Undervoltage Lockout, VISO and VDDB Supply

 

 

 

 

 

 

 

Positive-Going Threshold

 

VDDBUV+

8.0

 

10.1

V

 

Negative-Going Threshold

 

VDDBUV−

7.4

 

9.0

V

 

Hysteresis

V

DDBUVH

 

0.9

 

V

 

Undervoltage Lockout, VDD1 Supply

 

 

 

 

 

 

 

Positive-Going Threshold

 

VDD1UV+

3.5

 

4.2

V

 

Negative-Going Threshold

 

VDD1UV−

3.0

 

3.9

V

 

Hysteresis

V

DD1UVH

 

0.4

 

V

 

Output Short-Circuit Pulsed Current, Sourcing1

 

IOA, IOB

100

 

 

mA

 

Output Short-Circuit Pulsed Current, Sinking1

 

IOA, IOB

300

 

 

mA

 

SWITCHING SPECIFICATIONS

 

 

 

 

 

 

 

Minimum Pulse Width2

 

PW

 

 

100

ns

CL = 200 pF

Maximum Switching Frequency3

 

 

1

 

 

MHz

CL = 200 pF

Propagation Delay4

 

tPHL, tPLH

 

 

100

ns

CL = 200 pF

Change vs. Temperature

 

 

 

100

 

ps/°C

 

Pulse Width Distortion, |tPLH − tPHL|

PWD

 

 

8

ns

CL = 200 pF

Channel-to-Channel Matching, Rising or Falling

 

tM2

 

 

8

ns

CL = 200 pF

Matching Edge Polarity5

 

 

 

 

 

 

 

Channel-to-Channel Matching, Rising vs. Falling

 

tM1

 

 

10

ns

CL = 200 pF

Opposite Edge Polarity6

 

 

 

 

 

 

 

Part-to-Part Matching, Rising or Falling Edges7

 

 

 

 

55

ns

CL = 200 pF

Part-to-Part Matching, Rising vs. Falling Edges8

 

 

 

 

63

ns

CL = 200 pF

Rev. 0 | Page 3 of 16

ADuM5230

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions

 

 

 

 

 

 

 

Common-Mode Transient Immunity

|CMH|

25

35

 

kV/μs

VIx = VDD1, VCM = 1000 V,

at Logic High Output

 

 

 

 

 

transient magnitude = 800 V

Common-Mode Transient Immunity

|CML|

25

35

 

kV/μs

VIx = 0 V, VCM = 1000 V,

at Logic Low Output

 

 

 

 

 

transient magnitude = 800 V

Output Rise Time (10% to 90%)

tR

 

 

25

ns

CL = 200 pF, IISO = 10 mA,

 

 

 

 

 

 

100 kHz switching frequency

Output Fall Time (10% to 90%)

tF

 

 

10

ns

CL = 200 pF, IISO = 10 mA,

 

 

 

 

 

 

100 kHz switching frequency

 

 

 

 

 

 

 

1 Short-circuit duration is less than 1 sec. Average output current must conform to the limit shown under the Absolute Maximum Ratings section.

2 The minimum pulse width is the shortest pulse width at whichthe specified timing parameters are guaranteed. Operation below the minimum pulse width is strongly discouraged because in some instances pulse stretching to 1 μs may occur.

3The maximum switching frequency is the maximum signal frequency at which the specified timing and power conversion parameters are guaranteed. Operation above the maximum frequency is strongly discouraged.

4tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.

5In channel-to-channel matching, the rising or falling matching edge polarity is the magnitude of the propagation delay difference between two channels of the same part when both inputs are either both rising or falling edges. The loads on each channel are equal.

6 In channel-to-channel matching, the rising vs. falling opposite edge polarity is the magnitude of the propagation delay difference between two channels of the same part when one input is a rising edge and one input is a falling edge. The loads on each channel are equal.

7In part-to-part matching, the rising or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.

8In part-to-part matching, the rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.

Rev. 0 | Page 4 of 16

Analog Devices EVAL-ADE7169F16EB, ADUM5230ARWZ, ADUM5230, ADE7100 Datasheet

ADuM5230

PACKAGE CHARACTERISTICS

Table 2.

Parameter

Symbol

Min Typ

Max

Unit

Test Conditions

Resistance (Input-to-Output)1

RI-O

1012

 

Ω

 

Capacitance (Input-to-Output)1

CI-O

2.0

 

pF

f = 1 MHz

Input Capacitance

CI

4.0

 

pF

 

IC Junction-to-Ambient Thermal Resistance

θJA

48

 

°C/W

 

1 The device is considered a two-terminal device: Pin 1 to Pin 8 are shorted together, and Pin 9 to Pin 16 are shorted together.

REGULATORY INFORMATION

The ADuM5230 will be approved by the organization listed in Table 3.

Table 3.

UL1 (pending)

Recognized under 1577 component recognition program, File E214100

1 In accordance with UL1577, each ADuM5230 is proof-tested by applying an insulation test voltage ≥3000 V rms for 1 sec (current leakage detection limit = 5 μA).

INSULATION AND SAFETY-RELATED SPECIFICATIONS

 

 

Table 4.

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

 

Symbol

Value

Unit

Conditions

 

Rated Dielectric Insulation Voltage

 

 

2500

 

V rms

1 minute duration

 

Minimum External Air Gap (Clearance)

L(I01)

 

3.5 min

mm

Measured from input conductors to output conductors,

 

 

 

 

 

 

 

 

 

 

shortest distance through air

 

Minimum External Tracking (Creepage)

L(I02)

 

3.5 min

mm

Measured from input conductors to output conductors,

 

 

 

 

 

 

 

 

 

 

shortest distance path along body

 

Minimum Internal Gap (Internal

 

 

 

0.017 min

mm

Distance through the insulation

 

Clearance)

 

 

 

 

 

 

 

 

 

 

Tracking Resistance (Comparative

CTI

 

>175

 

V

DIN IEC 112/VDE 0303 Part 1

 

Tracking Index)

 

 

 

 

 

 

 

 

 

Isolation Group

 

 

 

 

 

IIIa

 

 

Material Group (DIN VDE 0110, 1/89, Table 1)

 

600

 

 

 

 

 

 

 

 

RECOMMENDED OPERATING CONDITIONS

 

 

 

 

 

 

 

 

 

 

(mA)

500

 

 

 

 

 

 

 

 

Table 5.

 

CURRENT

 

 

 

 

 

 

 

 

 

Parameter

Value

 

 

 

 

 

 

 

 

 

 

 

400

 

 

 

 

 

 

 

 

Operating Temperature (TA)

−40°C to +105°C

DD1

 

 

 

 

 

 

 

 

 

Input Supply Voltage1 (VDD1)

4.5 V to 5.5 V

300

 

 

 

 

 

 

 

 

Channel B Supply Voltage1 (VDDB)

12 V to 18.5 V

V

 

 

 

 

 

 

 

 

OPERATING

 

 

 

 

 

 

 

 

 

Input Signal Rise and Fall Times

1 ms

 

 

 

 

 

 

 

 

 

 

 

200

 

 

 

 

 

 

 

 

Minimum VDD1 Power-On Slew Rate2 (PSLEW)

400 V/ms

SAFE

100

 

 

 

 

 

 

 

 

1 All voltages are relative to their respective ground.

 

 

 

 

 

 

 

 

 

2 The ADuM5230 power supply may fail to initialize properly if VDD1 is applied

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

too slowly.

 

 

0

 

 

 

 

 

 

-010

 

 

 

 

–40

0

40

80

120

160

200

 

 

 

 

07080

 

 

 

 

 

 

AMBIENT TEMPERATURE (°C)

 

 

 

 

 

Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on

Case Temperature, per DIN EN 60747-5-2

Rev. 0 | Page 5 of 16

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