Analog Devices DAC8420QBC, DAC8420FS, DAC8420FQ, DAC8420FP, DAC8420ES Datasheet

a		Quad 12-Bit Serial
		Voltage Output DAC
		DAC8420

FEATURES

Guaranteed Monotonic Over Temperature Excellent Matching Between DACs Unipolar or Bipolar Operation

Buffered Voltage Outputs

High Speed Serial Digital Interface Reset to Zeroor Center-Scale

Wide Supply Range, +5 V-Only to 615 V

Low Power Consumption (35 mW max) Available in 16-Pin DIP and SOL Packages

APPLICATIONS

Software Controlled Calibration

Servo Controls

Process Control and Automation

ATE

FUNCTIONAL BLOCK DIAGRAM

				VREFHI	VDD
				5	1
SDI 10
				REG DAC A	7	VOUTA
				AA
			12
CS 12
CLK 11				REG DAC B	6	VOUTB
	SHIFT			B
	REGISTER
NC 13				REG DAC C
			4		3	VOUTC
				C
LD 14	DECODE
		2		REG DAC D	2	VOUTD
				D
9	16	15		4	8

GND

CLSEL CLR

VREFLO

VSS

GENERAL DESCRIPTION

The DAC8420 is a quad, 12-bit voltage-output DAC with serial digital interface, in a 16-pin package. Utilizing BiCMOS technology, this monolithic device features unusually high circuit density and low power consumption. The simple, easy-to-use serial digital input and fully buffered analog voltage outputs require no external components to achieve specified performance.

The three-wire serial digital input is easily interfaced to microprocessors running at 10 MHz rates, with minimal additional circuitry. Each DAC is addressed individually by a 16-bit serial word consisting of a 12-bit data word and an address header. The user-programmable reset control CLR forces all four DAC outputs to either zero or midscale, asynchronously overriding the current DAC register values. The output voltage range, determined by the inputs VREFHI and VREFLO, is set by the user for positive or negative unipolar or bipolar signal swings within the supplies allowing considerable design flexibility.

The DAC8420 is available in 16-pin epoxy DIP, cerdip, and wide-body SOL (small-outline surface mount) packages. Operation is specified with supplies ranging from +5 V-only to ±15 V, with references of +2.5 V to ±10 V respectively. Power dissipation when operating from ±15 V supplies is less than 255 mW (max), and only 35 mW (max) with a +5 V supply.

For applications requiring product meeting MIL-STD-883, contact your local sales office for the DAC8420/883 data sheet, which specifies operation over the –55°C to +125°C temperature range.

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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: [phone] Fax: [phone]

ELECTRICAL CHARACTERISTICS

DAC8420–SPECIFICATIONS

(at VDD = +5.0 V 6 5%, VSS = 0.0 V, VVREFHI = +2.5 V, VVREFLD = 0.0 V, and VSS = –5.0 V 6 5%, VVREFLO = –2.5 V, –408C ≤ TA ≤ +858C unless otherwise noted. See Note 1 for supply variations.)

Parameter	Symbol	Condition	Min	Typ	Max	Units
STATIC ACCURACY				±1/4	±1
Integral Linearity “E”	INL					LSB
Integral Linearity “E”	INL	Note 2, VSS = 0 V		±1/2	±3	LSB
Integral Linearity “F”	INL			±3/4	±2	LSB
Integral Linearity “F”	INL	Note 2, VSS = 0 V		±1	±4	LSB
Differential Linearity	DNL	Monotonic Over Temperature		±1/4	±1	LSB
Min-Scale Error	ZSE	RL = 2 kΩ, VSS = –5 V			±4	LSB
Full-Scale Error	FSE	RL = 2 kΩ, VSS = –5 V			±4	LSB
Min-Scale Error	ZSE	Note 2, RL = 2 kΩ, VSS = 0 V			±8	LSB
Full-Scale Error	FSE	Note 2, RL = 2 kΩ, VSS = 0 V			±8	LSB
Min-Scale Tempco	TCZSE	Note 3, RL = 2 kΩ, VSS = –5 V		±10		ppm/°C
Full-Scale Tempco	TCFSE	Note 3, RL = 2 kΩ, VSS = –5 V		±10		ppm/°C
MATCHING PERFORMANCE				±1
Linearity Matching						LSB
REFERENCE
Positive Reference Input Range	VVREFHI	Note 4	VVREFLO +2.5		VDD –2.5	V
Negative Reference Input Range	VVREFLO	Note 4	VSS		VVREFHI –2.5	V
Negative Reference Input Range	VVREFLO	Note 4, VSS = 0 V	0	±0.25	VVREFHI –2.5	V
Reference High Input Current	IVREFHI	Codes 000H, 555H	–0.75		+0.75	mA
Reference Low Input Current	IVREFLO	Codes 000H, 555H, VSS = –5 V	–1.0	–0.6		mA
AMPLIFIER CHARACTERISTICS
Output Current	IOUT	VSS = –5 V	–1.25		+1.25	mA
Settling Time	tS	to 0.01%, Note 5		8		μs
Slew Rate	SR	10% to 90%, Note 5		1.5		V/μs
LOGIC CHARACTERISTICS
Logic Input High Voltage	VINH		2.4			V
Logic Input Low Voltage	VINL				0.8	V
Logic Input Current	IIN				10	μA
Input Capacitance	CIN	Note 3		13		pF
LOGIC TIMING CHARACTERISTICS3, 6
Data Setup Time	tDS		25			ns
Data Hold	tDH		55			ns
Clock Pulse Width HIGH	tCH		90			ns
Clock Pulse Width LOW	tCL		120			ns
Select Time	tCSS		90			ns
Deselect Delay	tCSH		5			ns
Load Disable Time	tLD1		130			ns
Load Delay	tLD2		35			ns
Load Pulse Width	tLDW		80			ns
Clear Pulse Width	tCLRW		150			ns
SUPPLY CHARACTERISTICS
Power Supply Sensitivity	PSRR			0.002	0.01	%/%
Positive Supply Current	IDD			4	7	mA
Negative Supply Current	ISS		–6	–3		mA
Power Dissipation	PDISS	VSS = 0 V		20	35	mW

NOTES

1All supplies can be varied ±5% and operation is guaranteed. Device is tested with VDD = +4.75 V.

2For single-supply operation (VVREFLO = 0 V, VSS = 0 V), due to internal offset errors INL and DNL are measured beginning at code 003H. 3Guaranteed but not tested.

4Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.

5VOUT swing between +2.5 V and –2.5 V with VDD = 5.0 V.

6All input control signals are specified with tr = tf =5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V. 7Typical values indicate performance measured at +25°C.

Specifications subject to change without notice.

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ELECTRICAL CHARACTERISTICS (at VDD = +15.0 V 6 5%, VSS = –15.0 V 6 5%, VVREFHI = +10.0 V,						DAC8420
VVREFLO = –10.0 V, –408C ≤ TA ≤ +858C unless otherwise noted. See Note 1 for supply variations.)
Parameter	Symbol	Condition		Min	Typ	Max	Units
STATIC ACCURACY					±1/4	±1/2
Integral Linearity “E”	INL						LSB
Integral Linearity “F”	INL				±1/2	±1	LSB
Differential Linearity	DNL	Monotonic Over Temperature			±1/4	±1	LSB
Min-Scale Error	ZSE	RL = 2 kΩ				±2	LSB
Full-Scale Error	FSE	RL = 2 kΩ				±2	LSB
Min-Scale Tempco	TCZSE	Note 2, RL = 2 kΩ			±4		ppm/°C
Full-Scale Tempco	TCFSE	Note 2, RL = 2 kΩ			±4		ppm/°C
MATCHING PERFORMANCE					±1
Linearity Matching							LSB
REFERENCE
Positive Reference Input Range	VVREFHI	Note 3		VVREFLO +2.5		VDD –2.5	V
Negative Reference Input Range	VVREFLO	Note 3		–10	±1.0	VVREFHI –2.5	V
Reference High Input Current	IVREFHI	Codes 000H, 555H		–2.0		+2.0	mA
Reference Low Input Current	IVREFLO	Codes 000H, 555H		–3.5	–2.0		mA
AMPLIFIER CHARACTERISTICS
Output Current	IOUT			–5		+5	mA
Settling Time	tS	to 0.01%, Note 4			13		μs
Slew Rate	SR	10% to 90%, Note 4			2		V/μs
DYNAMIC PERFORMANCE
Analog Crosstalk		Note 2			>64		dB
Digital Feedthrough		Note 2			>72		dB
Large Signal Bandwidth		3 dB, VVREFHI = 5 V + 10 V p-p,			90		kHz
		VVREFLO = –10 V, Note 2
Glitch Impulse		Code Transition = 7FFH to 800H, Note 2			64		nV-s
LOGIC CHARACTERISTICS
Logic Input High Voltage	VINH			2.4			V
Logic Input Low Voltage	VINL					0.8	V
Logic Input Current	IIN					10	μA
Input Capacitance	CIN	Note 2			13		pF
LOGIC TIMING CHARACTERISTICS2, 5
Data Setup Time	tDS			25			ns
Data Hold	tDH			20			ns
Clock Pulse Width HIGH	tCH			30			ns
Clock Pulse Width LOW	tCL			50			ns
Select Time	tCSS			55			ns
Deselect Delay	tCSH			15			ns
Load Disable Time	tLD1			40			ns
Load Delay	tLD2			15			ns
Load Pulse Width	tLDW			45			ns
Clear Pulse Width	tCLRW			70			ns
SUPPLY CHARACTERISTICS
Power Supply Sensitivity	PSRR				0.002	0.01	%/%
Positive Supply Current	IDD				6	9	mA
Negative Supply Current	ISS			–8	–5		mA
Power Dissipation	PDISS					255	mW

NOTES

1All supplies can be varied ±5% and operation is guaranteed. 2Guaranteed but not tested.

3Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.

4VOUT swing between +10 V and –10 V.

5All input control signals are specified with tr = tf =5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V. 6Typical values indicate performance measured at +25°C.

Specifications subject to change without notice.

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DAC8420

WAFER TEST LIMITS

(at VDD = +15.0 V, VSS = –15.0 V, VREFHI = +10.0 V, VREFLO = –10.0 V, TA = +258C unless otherwise noted)

			DAC8420G
Parameter	Symbol	Conditions	Limit	Units
Integral Linearity	INL		±1	LSB max
Differential Linearity	DNL		±1	LSB max
Min-Scale Offset			±1	LSB max
Max-Scale Offset			±1	LSB max
Logic Input High Voltage	VINH		2.4	V min
Logic Input Low Voltage	VINL		0.8	V max
Logic Input Current	IIN		1	μA max
Positive Supply Current	IDD		8	mA max
Negative Supply Current	ISS		7	mA max

NOTE

Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.

ABSOLUTE MAXIMUM RATINGS

(TA = +25°C unless otherwise noted)

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +18.0 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, –18.0 V VSS to VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +36.0 V VSS to VVREFLO . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VSS – 2.0 V VVREFHI to VVREFLO . . . . . . . . . . . . . . . . . . . +2.0 V, VDD – VSS VVREFHI to VDD . . . . . . . . . . . . . . . . . . . . . . . +2.0 V, +33.0 V IVREFHI, IVREFLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA Digital Input Voltage to GND . . . . . . . . . –0.3 V, VDD + 0.3 V

Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Operating Temperature Range

EP, FP, ES, FS, EQ, FQ . . . . . . . . . . . . . . –40°C to +85°C Dice Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . +300°C

	Thermal Resistance
Package Type	θJA	θJC	Units
16-Pin Plastic DIP (P)	701	27	°C/W
16-Pin Hermetic DIP (Q)	821	9	°C/W
16-Lead Small Outline	862		°C/W
Surface Mount (S)		22

NOTES

1θJA is specified for worst case mounting conditions, i.e., θJA is specified for device in socket.

2θJA is specified for device on board.

CAUTION

1.Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to the above maximum rating conditions for extended periods may affect device reliability.

2.Digital inputs and outputs are protected, however, permanent damage may occur on unprotected units from high-energy electrostatic fields. Keep units in conductive foam or packaging at all times until ready to use. Use proper antistatic handling procedures.

3.Remove power before inserting or removing units from their sockets.

4.Analog Outputs are protected from short circuits to ground or either supply.

DICE CHARACTERISTICS

(SUBSTRATE)
VOUTD	VDD	CLSEL	CLR
2	1	16	15

14 LD

13 NC

VOUTC 3

VREFLO 4

VREFHI 5

VOUTB 6

12 CS

11 CLK

7	8	9	10
VOUTA	VSS GND		SDI

NC = NO CONNECT

Die Size 0.119 × 0.283 inch, 33,677 sq. mils (3.023 × 7.188 mm, 21.73 sq. mm) Transistor Count 2,207

For additional DICE ordering information, refer to databook.

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DAC8420

DATA LOAD SEQUENCE

tCSH

CS

tCSS

SDI

A1

A0

X

X

D11 D10

D9

D8

D4

D3

D2

D1

D0

CLK

tLD1

tLD2

LD

DATA LOAD TIMING

tDS

tDH

CLEAR TIMING

SDI

CLSEL

CLK

tCH

CLR

tCLRW

tCL

tS

tCSH

±1LSB

CS

VOUT

LD

tLD2

tLDW

VOUT

tS

±1LSB

Timing Diagram

		10Ω					5kΩ
+15V
	+				1		16
		10µF	0.1µF
1N4001				NC	2		15
		10Ω		NC	3		14
					4		13 NC
–10V						DUT
1N4001		10µF	0.1µF
	+				5		12
		10Ω	5kΩ	NC	6		11
+10V
	+	10µF	0.1µF	NC	7		10
1N4001					8		9
		10Ω					10kΩ
–15V
1N4001	+	10µF	0.1µF			NC = NO CONNECT

ORDERING GUIDE

	Temperature	INL	Package		Package
Model1	Range	(6LSB)	Description		Option2
DAC8420EP	–40°C to +85°C	0.5	Plastic DIP		P
DAC8420EQ	–40°C to +85°C	0.5	Cerdip		Q
DAC8420ES	–40°C to +85°C	0.5	SOIC		SOL
DAC8420FP	–40°C to +85°C	1.0	Plastic DIP		P
DAC8420FQ	–40°C to +85°C	1.0	Cerdip		Q
DAC8420FS	–40°C to +85°C	1.0	SOIC		SOL
DAC8420QBC	–40°C to +85°C	1.0	Dice3

NOTES

1A complete /883 data sheet is available. For availability and burn-in information, contact your local sales office.

2PMI division letter designator.

3Dice tested at +25°C only.

Burn-In Diagram

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