Analog Devices EE168 Application Notes

Engineer To Engineer Note	EE-168
Technical Notes on using Analog Devices' DSP components and development tools
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Using Third Overtone Crystals with the ADSP-218x DSP

Contributed by Larry Hurst

Introduction

DSPs frequently require an input clock frequency (CLKIN) that is over 35MHz. Unfortunately fundamental mode crystals over 35MHz are not popular and tend to be expensive and fragile. Packaged clock oscillators cost considerably more than a crystal so, for some applications, using a 3rd overtone (3rd OT) crystal may be a sensible choice.

While the current trend is to incorporate PLL frequency multiplication into the DSP, using a low frequency input clock to generate internal core clocks of several hundred MHz, there are still occasions when it might be useful to consider using a 3rd OT crystal.

This note discusses using readily available 3rd overtone crystals, at frequencies over 35MHz, with the ADSP-218x family of DSPs. A design procedure is developed for calculating the optimum values for the support components. This procedure can be extended to CODECs and other applications requiring input clocks over 35MHz.

Cautionary Note

There are a number of cautions that should be noted when deciding to use a 3rd OT crystal oscillator.

First, a 3rd OT crystal normally has a higher ESR, typically more than twice that of a fundamental mode crystal at the same frequency.

August 8, 2002

Second, a 3rd OT crystal has a lower activity, (i.e. requires a higher minimum drive level to start reliably).

For these reasons, extra care should be taken when designing 3rd OT crystal oscillators and careful testing should be performed over temperature, voltage and with a representative batch of crystals to ensure that all parts operate reliably.

Note that there is often no indication, marked on the crystal package, to show that a crystal is intended for 3rd OT operation verses fundamental mode operation. Care should be taken to determine this information. If a crystal is used in a traditional (two capacitor fundamental mode circuit) appears to be oscillating at approximately one third of the frequency marked on it’s package, it is very likely that it is intended for 3rd OT operation.

Design Method

When a 3rd OT crystal is chosen, two additional circuit components must be added to the traditional parallel, or fundamental mode circuit, to force oscillation at the overtone frequency marked on the crystal. The added components consist of a series inductor and capacitor as shown in Figure 1. If L1 and C3 are not added to the circuit, the crystal will oscillate at its fundamental frequency, which is approximately one third of the desired overtone frequency.

Copyright 2002, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of customers’ products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property of their respective holders. Information furnished by Analog Devices Applications and Development Tools Engineers is believed to be accurate and reliable, however no responsibility is assumed by Analog Devices regarding the technical accuracy and topicality of the content provided in all Analog Devices’ Engineer-to-Engineer Notes.

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ADSP-218x-/L/M/N DSP						18		- =5V
					VDDINT		•	L=3.3V
						17		M=2.5V
							• C4
					GND			N=1.8V
		CFB			CLKOUT	16
	••		••			15		- =5V
CIN		R		COUT	VDDEXT		•	L=3.3V
						17		M=2.5-3.3V
GND	•	FB	•	XTAL	GND		• C5	N=1.8-3.3V
	CLKIN
12	13	14
	•	CFBS	•
	•		•	COS	COMPONENTS
	CIS
	•		•	L1		ADDED
						FOR 3RDOT
CIS, CFBS, COS		Y	•
ARE STRAY	C1	1		C3		OSCILLATOR
		C2
CAPACITANCES

Figure 1: Schematic of 3rd Overtone Crystal Oscillator

Note that the three capacitors, C1, C2 and C3, must be ‘RF’ types with low loss dielectrics at the frequencies being used. Examples of capacitors with suitable dielectrics include silver mica, polystyrene and ceramic NP0.

The inductor, L1, must also be chosen for low RF losses (i.e. high ‘Q’). At these frequencies and inductance values this usually means an air core type, although there are some inductors that use special formulations of iron dust and/or ferrites that result in high Q. As a guide, look for an inductor with a Q greater than 30, DC resistance less than 1.0Ω and a selfresonant frequency (SRF) greater than 120MHz.

The crystal’s load capacitance (CL) is required to ensure the crystal operates at the labeled frequency and will be specified by the crystal manufacturer. This is usually a ‘standard’ value and 18pF is very common. It is up to the engineer to choose the correct values for C1, C2, C3 and L1 in conjunction with the amplifier and stray PCB capacitance, to provide the correct load capacitance, CL. C1 and C2 will usually be between 20pF and 70pF.

C3 is only required for blocking DC current that would otherwise load the output of the oscillator. Its value is not critical and a value of 1nF NP0 should be satisfactory.

The inductor, L1, is chosen to resonate with C2 and the stray output capacitance at a frequency fR ≈ ⅔ of the 3rd OT frequency, fOT. This provides the correct loading reactance for the crystal and closed loop phase relationship to start and maintain oscillation. In addition, the parallel combination of L1 and C2 must provide

an effective capacitance, C2EFF at the 3rdOT frequency, fOT, to correctly load the crystal.

We have the following two equations with two unknown values, L1 and C2 …

fR =	2fOT			=		1			Equation 1
	3			2π		(C2 +COUT +COS )L1
@ fOT ,		XC2		× XL1		= XC2EFF =	1		Equation 2
		X	C2	+ X	L1		2πf C
							OT	2EFF

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where fR is the actual resonant frequency of L1 combined with the total output capacitance, C2,

COUT and COS. Note that C2 is the actual capacitor value used while C2EFF is the effective

capacitance at fOT due to the parallel combination of C2 and L1.

The reactance of C3 is small enough to be ignored. Similarly the contributions of the feedback capacitances, CFB and CFBS, are very small and can be ignored in determining the required values of C2 and L1.

With some simple arithmetic manipulation we have the resulting design equations for C2 and L1 …

C = 9C2EFF + 4(COUT +COS )
2	5
	Equation 3

L1 = 4ωOT2 (C2EFF +5COUT +COS )

Equation 4 where: ωOT = 2πfOT

Summarizing, the crystal manufacturer will specify a total load capacitance for the crystal. This is the TOTAL value of capacitance that must appear across the two terminals of the crystal for the operating frequency to be within the specified tolerance of the value stamped on the package. The total capacitance is usually called the load capacitance, CL, and will consist of the amplifier input capacitance, CIN, feedback capacitance, CFB and output capacitance, COUT.

Added to these is the PCB stray capacitances, CIS, CFBS and COS. Finally we have to add the external capacitors C1 and the parallel combination of C2 and L1.

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Example: Determining External Load Capacitors, C1, C2 and Inductor L1

Assume a manufacturer specifies a 37.5MHz 3rd OT crystal with a load capacitance, CL=18pF. For the ADSP-218xM/N oscillator amplifier, typical values are CIN = 5pF, COUT = 7pF and CFB = 1pF. For the PCB stray capacitances, assume CIS=2pF, COS=3pF and CFBS=1pF. These are all reasonable approximations and, in practice, a couple of pF either way will not make much difference.

To calculate the equivalent capacitance across the crystal, first note that the input and output capacitances are effectively in series.

Therefore, the amplifier total capacitance,

CAT:

CAT = CFB + CINCOUT/(CIN + COUT)

= [1+ 5×7/(5 + 7)] ≈ 4pF

For the PCB total capacitance, CPCBT:

CPCBT = CFBS + CISCOS/(CIS + COS)

= [1 + 2×3/(2 + 3)] ≈ 2pF

Therefore, total Amplifier and PCB stray capacitance, CST:

CST = CAT + CPCBT

≈ 6pF

The total load capacitance is specified by the crystal manufacturer. In this case, CL = 18pF. We have 6pF provided by the amplifier in the DSP and stray PCB capacitance, as noted above. Hence we have to add another 12pF in parallel to make a total of 18pF. This capacitance is provided by C1 and the combination of C2 in parallel with L1.

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NOTE: It is most common to make C1 and C2 equal, and, since they are in series across

the crystal, the resulting values for C1 and C2EFF will each be 24pF, the series combination

making the 12pf required to make-up the specified total load capacitance.

NOTE that this ‘sleight of hand’ introduction of capacitance C2EFF in place of C2

which is the effective capacitance of the parallel combination of C2 and L1 required to make 24pF at the 3rd OT frequency.

At this point we have determined the value of C1 - in this example,

C1 = 24pF

From the design equations, 3 & 4, we can determine the values of C2 & L1,

	C2	=		9C2EFF + 4(COUT +COS )
			5
	C2 = [9*24 + 4(7+3)]/5 = 51.2pF
				C2	= 51.2pF
Also,			knowing the required crystal

overtone frequency, ωOT	= 2πfOT =
2π×37.5MHz;

L1 = 4ωOT2 (C2EFF +5COUT +COS )

L1 = 5/[4(2π37.5×10E6)2(24+7+5)10E-12]

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= 662.2×10-9HL1 = 662.2nH

Checking Calculated Values

To check the effective capacitance of the C2//L1 combination at fOT, we can use the expression;

			1	+ jωL
C2EFF =		jωC2			1
			1
	jω		jωC2		× jωL1

which simplifies to;

C2EFF =C2 − ω2 1×L1

Substituting values;

C2EFF = 51.2pF – 1/(2π37.5E6)2×662.2E-9

C2EFF = 24pF 3

Also, to confirm the frequency of resonance, from equation 1;

fr = 1/[2π√{(51.2pF + 7pF + 5pF)662.2nH}]

fr = 25.0MHz = 2fOT/3 3

So all the calculations look good. Using preferred values, we can complete our design as shown in Figure 2. (See Appendix A for a detailed component list)

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