a |
12-Bit High Speed Multiplying |
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D/A Converter |
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DAC312 |
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FEATURES
Differential Nonlinearity: 61/2 LSB
Nonlinearity: 0.05%
Fast Settling Time: 250 ns High Compliance: –5 V to +10 V Differential Outputs: 0 to 4 mA
Guaranteed Monotonicity: 12 Bits Low Full-Scale Tempco: 10 ppm/8C
Circuit Interface to TTL, CMOS, ECL, PMOS/NMOS Low Power Consumption: 225 mW
Industry Standard AM6012 Pinout Available In Die Form
GENERAL DESCRIPTION
The DAC312 series of 12-bit multiplying digital-to-analog converters provide high speed with guaranteed performance to 0.012% differential nonlinearity over the full commercial operating temperature range.
The DAC312 combines a 9-bit master D/A converter with a 3-bit (MSBs) segment generator to form an accurate 12-bit D/A converter at low cost. This technique guarantees a very uniform step size (up to ±1/2 LSB from the ideal), monotonicity to 12-bits and integral nonlinearity to 0.05% at its differential current outputs. In order to provide the same performance with a 12-bit R-2R ladder design, an integral nonlinearity over temperature of 1/2 LSB (0.012%) would be required.
The 250 ns settling time with low glitch energy and low power consumption are achieved by careful attention to the circuit design and stringent process controls. Direct interface with all popular logic families is achieved through the logic threshold terminal.
PIN CONNECTIONS
20-Pin Hermetic DIP (R-Suffix),
20-Pin Plastic DIP (P-Suffix),
20-Pin SOL (S-Suffix)
High compliance and low drift characteristics (as low as
10 ppm/°C) are also features of the DAC312 along with an excellent power supply rejection ratio of ±.001% FS/% V. Operating over a power supply range of +5/–11 V to ±18 V the device consumes 225 mW at the lower supply voltages with an absolute maximum dissipation of 375 mW at the higher supply levels.
With their guaranteed specifications, single chip reliability and low cost, the DAC312 device makes excellent building blocks for A/D converters, data acquisition systems, video display drivers, programmable test equipment and other applications where low power consumption and complete input/output versatility are required.
FUNCTIONAL BLOCK DIAGRAM
REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
DAC312–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(@ VS = 615 V, IREF = 1.0 mA, 08C ≤ TA ≤ +708C for DAC312E and –408C ≤ TA ≤ +858C for DAC312F, DAC312H, unless otherwise noted. Output characteristics refer
to both IOUT and IOUT.)
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DAC312E |
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DAC312F |
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DAC312H |
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Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Min |
Typ |
Max |
Min |
Typ |
Max |
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Units |
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Resolution |
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12 |
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12 |
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12 |
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Bits |
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Monotonicity |
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12 |
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±0.0125 |
12 |
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±0.0250 |
12 |
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±0.0250 |
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Bits |
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Differential Nonlinearity |
DNL |
Deviation from Ideal |
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%FS |
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Step Size2 |
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±0.5 |
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±1 |
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±1 |
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LSB |
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Nonlinearity |
INL |
Deviation from Ideal |
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±0.05 |
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±0.05 |
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±0.05 |
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%FS |
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Straight Line1 |
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Full-Scale Current |
IFS |
VREF = 10 V |
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R14 = R15 = 10 kΩ2 |
3.967 |
3.999 |
4.031 |
3.935 |
3.999 |
4.063 |
3.935 |
3.999 |
4.063 |
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mA |
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Full-Scale Tempco |
TCIFS |
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±5 |
±20 |
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±10 |
±40 |
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±80 |
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ppm/°C |
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±0.005 |
±0.002 |
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±0.001 |
±0.004 |
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±0.008 |
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%FS/°C |
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Output Voltage Compliance |
VOC |
DNL Specification Guaran- |
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teed over Compliance Range |
–5 |
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+10 |
–5 |
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+10 |
–5 |
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+10 |
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V |
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Full-Scale Symmetry |
IFSS |
|IFS|–|IFS| |
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±0.4 |
±1 |
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±0.4 |
±2 |
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±0.4 |
±2 |
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μA |
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Zero-Scale Current |
IZS |
To ±1/2 LSB, All Bits |
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0.10 |
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0.10 |
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0.10 |
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μA |
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Settling Time |
tS |
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Switched ON or OFF1 |
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250 |
500 |
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250 |
500 |
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250 |
500 |
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ns |
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Propagation Delay–All Bits |
tPLH |
All Bits Switched 50% Point |
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25 |
50 |
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25 |
50 |
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25 |
50 |
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ns |
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tPHL |
Logic Swing to 50% Point |
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25 |
50 |
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25 |
50 |
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25 |
50 |
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ns |
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Output1 |
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MΩ |
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Output Resistance |
RO |
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>10 |
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>10 |
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>10 |
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Output Capacitance |
COUT |
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20 |
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20 |
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20 |
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pF |
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Logic Input |
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Levels “0” |
VIL |
VLC = GND |
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0.8 |
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0.8 |
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0.8 |
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V |
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Levels “1” |
VIH |
VLC = GND |
2 |
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2 |
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2 |
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V |
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Logic Input Current |
IIN |
VIN = –5 to +18 V |
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40 |
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40 |
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40 |
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μA |
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Logic Input Swing |
VIS |
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–5 |
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+18 |
–5 |
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+18 |
–5 |
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+18 |
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V |
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Reference Bias Current |
I15 |
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0 |
–0.5 |
–2 |
0 |
–0.5 |
–2 |
0 |
–0.5 |
–2 |
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μA |
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Reference Input |
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R14(eq) = 800 Ω, CC = 0 pF1 |
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mA/μs |
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Slew Rate |
dl/dt |
4 |
8 |
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4 |
8 |
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4 |
8 |
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Power Supply Sensitivity |
PSSIFS+ |
V+ = +13.5 V to +16.5 V, |
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±0.0005 |
±0.001 |
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±0.0005 |
±0.001 |
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±0.0005 |
±0.001 |
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V– = –15 V |
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%FS/% |
V |
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PSSIFS– |
V– = –13.5 V to –16.5 V, |
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±0.00025 |
±0.001 |
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±0.00025 |
±0.001 |
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±0.00025 |
±0.001 |
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V+ = +15 V |
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%FS/% |
V |
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Power Supply Range |
V+ |
VOUT = 0 V |
4.5 |
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18 |
4.5 |
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18 |
4.5 |
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18 |
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V |
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V– |
VOUT = 0 V |
–18 |
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–10.8 |
–18 |
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–10.8 |
–18 |
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–10.8 |
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V |
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Power Supply Current |
I+ |
V+ = +5 V, V– = –15 V |
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3.3 |
7 |
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3.3 |
7 |
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3.3 |
7 |
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mA |
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I– |
V+ = +15 V, V– = –15 V |
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–13.9 |
–18 |
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–13.9 |
–18 |
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–13 9 |
–18 |
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mA |
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I+ |
V+ = +5 V, V– = –15 V |
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3.9 |
7 |
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3.9 |
7 |
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3.9 |
7 |
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mA |
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I– |
V+ = +15 V, V– = –15 V |
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–13.9 |
–18 |
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–13.9 |
–18 |
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–13.9 |
–18 |
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mA |
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Power Dissipation |
Pd |
V+ = +5 V, V– = –15 V |
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225 |
305 |
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225 |
305 |
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225 |
305 |
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mW |
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V+ = +15 V, V– = –15 V |
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267 |
375 |
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267 |
375 |
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267 |
375 |
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mW |
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TYPICAL ELECTRICAL CHARACTERISTICS @ 258C; VS = 615 V, and IREF = 1.0 mA, unless otherwise noted. Output characteristics refer to both IOUT and IOUT.
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DAC312N |
DAC312G |
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Parameter |
Symbol |
Conditions |
Typical |
Typical |
Units |
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Reference Input |
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mA/μs |
Slew Rate |
dl/dt |
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8 |
8 |
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Propagation Delay |
tPLH, tPHL |
Any Bit |
25 |
25 |
ns |
Settling Time |
tS |
To ±1/2 LSB, All |
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Bits Switched ON |
250 |
250 |
ns |
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or OFF. |
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Full-Scale |
TCIFS |
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±10 |
±10 |
ppm/°C |
–2– |
REV. C |
DAC312
ELECTRICAL CHARACTERISTICS @ VS = 615 V, IREF = 1.0 mA, 08C ≤ TA ≤ 708C for DAC312E and –408C ≤ TA ≤ +858C for
DAC312F, DAC312H, unless otherwise noted. Output characteristics refer to both IOUT and IOUT. Continued
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DAC312E |
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DAC312F |
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DAC312H |
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Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Min |
Typ |
Max |
Min |
Typ |
Max |
Units |
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Logic Input |
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Levels “0” |
VIL |
VLC = GND |
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0.8 |
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0.8 |
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0.8 |
V |
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Logic Input |
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Levels “1” |
VIH |
VLC = GND |
2 |
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2 |
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2 |
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V |
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Logic Input |
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μA |
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Current |
IIN |
VIN = –5 V to +18 V |
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40 |
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40 |
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40 |
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Logic Input |
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Swing |
VIS |
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–5 |
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+18 |
–5 |
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+18 |
–5 |
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+18 |
V |
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Reference Bias |
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μA |
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Current |
I15 |
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0 |
–0.5 |
–2 |
0 |
–0.5 |
–2 |
0 |
–0.5 |
–2 |
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Reference Input |
dl/dt |
R14(eq) = 800 Ω |
4 |
8 |
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4 |
8 |
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4 |
8 |
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mA/μs |
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Slew Rate |
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CC = 0 pF (Note 1) |
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V+ = +13.5 V to +16.5 V, |
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±0.0005 |
±0.001 |
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±0.0005 |
±0.001 |
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±0.0005 |
±0.001 |
%FS/% |
V |
Power Supply |
PSSIFS+ |
V– = –15 V |
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±0.00025 |
±0.001 |
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±0.00025 |
±0.001 |
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±0.00025 |
±0.001 |
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Sensitivity |
PSSIFS– |
V– = –13.5 V to –16.5 V, |
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%FS/% |
V |
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V+ = +15 V |
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Power Supply |
V+ |
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4.5 |
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18 |
4.5 |
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18 |
4.5 |
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18 |
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Range |
V– |
VOUT = 0 V |
–18 |
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–10.8 |
–18 |
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–10.8 |
–18 |
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–10.8 |
V |
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I+ |
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3.3 |
7 |
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3.3 |
7 |
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3.3 |
7 |
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Power Supply |
I– |
V+ = +5 V, V– = –15 V |
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–13.9 |
–18 |
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–13.9 |
–18 |
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–13.9 |
–18 |
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Current |
I+ |
V+ = +15 V, V– = –15 V |
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3.9 |
7 |
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3.9 |
7 |
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3.9 |
7 |
mA |
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I– |
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–13.9 |
–18 |
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–13.9 |
–18 |
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–13.9 |
–18 |
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Power |
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V+ = +5 V, V– = –15 V |
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225 |
305 |
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225 |
305 |
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225 |
305 |
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Dissipation |
Pd |
V+ = +15 V, V– = –15 V |
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267 |
375 |
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267 |
375 |
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267 |
375 |
mW |
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NOTES
1Guaranteed by design.
2TA = +25°C for DAC312H grade only. Specifications subject to change without notice.
REV. C |
–3– |
DAC312
WAFER TEST LIMITS @ VS = 615 V, IREF = 1.0 mA, TA = 258C, unless otherwise noted. Output characteristics refer to both IOUT and IOUT.
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DAC312N |
DAC312G |
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Parameter |
Symbol |
Conditions |
Limit |
Limit |
Units |
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Resolution |
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12 |
12 |
Bits min |
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Monotonicity |
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12 |
12 |
Bits min |
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Nonlinearity |
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±0.05 |
±0.05 |
%FS max |
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Output Voltage |
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Full-Scale Current |
+10 |
+10 |
V max |
Compliance |
Voc |
Change <1/2 LSB |
–5 |
–5 |
V min |
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Full-Scale |
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VREF = 10.000 V |
4.031 |
4.063 |
mA max |
Current |
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R14, R15 = 10.000 kΩ |
3.967 |
3.935 |
mA min |
Full-Scale Symmetry |
IFSS |
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±1 |
±2 |
μA max |
Zero-Scale Current |
IZS |
|
0.1 |
0.1 |
μA max |
Differential |
DNL |
Deviation from |
±0.012 |
±0.025 |
%FS max |
Nonlinearity |
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Ideal Step Size |
±1/2 |
±1 |
Bits (LSB) max |
Logic Input Levels “0” |
VIL |
VLC = GND |
0.8 |
0.8 |
V max |
Logic Input Levels “1” |
VIH |
VLC = GND |
2 |
2 |
V min |
Logic Input Swing |
VIS |
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+18 |
+18 |
V max |
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–5 |
–5 |
V min |
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Reference Bias |
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μA max |
Current |
I15 |
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–2 |
–2 |
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Power Supply |
PSSIFS+ |
V+ = +13.5 V to +16.5 V, V– = –15 V |
±0.001 |
±0.001 |
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Sensitivity |
PSSIFS– |
V– = –13.5 V to –16.5 V, V+ = +15 V |
±0.001 |
±0.001 |
%/%max |
Power Supply |
I+ |
VS = +15 V |
7 |
7 |
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Current |
I– |
IREF ≤ 1.0 mA |
–18 |
–18 |
mA max |
Power |
|
VS = +15 V |
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Dissipation |
PD |
IREF ≤ 1.0 mA |
375 |
375 |
mW max |
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
DICE CHARACTERISTICS
1. |
B1 |
(MSB) |
11. |
B11 |
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2. |
B2 |
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12. |
B12 (LSB) |
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3. |
B3 |
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13. |
VLC/AGND |
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4. |
B4 |
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14. |
VREF(+) |
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5. |
B5 |
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15. |
VREF(–) |
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6. B6 |
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16. COMP |
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7. |
B7 |
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17. |
V– |
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8. |
B8 |
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18. |
IO |
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9. |
B9 |
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19. |
IO |
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10. |
B10 |
20. |
V+ |
DIE SIZE 0.141 × 0.096 inch, 13,536 sq. mils (3.58 × 2.44 mm, 8.74 sq. mm)
–4– |
REV. C |
DAC312
ABSOLUTE MAXIMUM RATINGS1 |
|
Operating Temperature |
0°C to +70°C |
DAC312E . . . . . . . . . . . . . . . . . . . . . . . . . . . |
|
DAC312F, DAC312H . . . . . . . . . . . . . . . . . . |
–40°C to +85°C |
Junction Temperature . . . . . . . . . . . . . . . . . . . . |
–65°C to +150°C |
Storage Temperature (Tj) . . . . . . . . . . . . . . . . . –65°C to +125°C
Lead Temperature (Soldering, 60 sec) |
. . . . . . . . . . |
. . . . . . 300°C |
||
Power Supply Voltage . . . . . . |
. . . . . . . |
. . . . . . . . . . |
. . . . . . ±18 V |
|
Logic Inputs . . . . . . . . . . . . . |
. . . . . . . |
. . . . . . . . . |
–5 V to +18 V |
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Analog Current Outputs . . . . . . . . . . . . . . . . . . . . |
–8 V to +12 V |
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Reference Inputs V14, V15 . . . |
. . . . . . . |
. . . . . . . . . . |
. . . V– to V+ |
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Reference Input Differential Voltage (V14, V15) . . . . |
. . . . . . ±18 V |
|||
Reference Input Current (I14) |
. . . . . . . |
. . . . . . . . . . |
. . . . 1.25 mA |
|
Package Type |
|
uJA2 |
uJC |
Units |
20-Pin Hermetic DIP (R) |
|
76 |
11 |
°C/W |
20-Pin Plastic DIP (P) |
|
69 |
27 |
°C/W |
20-Pin SOL (S) |
|
88 |
25 |
°C/W |
NOTES
1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.
2θJA is specified for worst case mounting conditions, i.e., θJA is specified for device in socket for cerdip and P-DIP packages; θJA is specified for device soldered to printed circuit board for SOL package.
ORDERING GUIDE1
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Temperature |
Package |
Package |
Model |
DNL |
Range |
Description |
Option |
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DAC312ER2 |
± 1/2 LSB |
0°C to +70°C |
Cerdip-20 |
Q-20 |
DAC312FR |
± 1 LSB |
–40°C to +85°C |
Cerdip-20 |
Q-20 |
DAC312BR/883 |
± 1 LSB |
–55°C to +125°C |
Cerdip-20 |
Q-20 |
DAC312HP |
± 1 LSB |
–40°C to +85°C |
Plastic DIP-20 |
N-20 |
DAC312HS |
± 1 LSB |
–40°C to +85°C |
SOL-20 |
R-20 |
NOTES
1Burn-in is available on commercial and industrial temperature range parts in cerdip, plastic DIP, and TO-can packages.
2For devices processed in total compliance to MIL-STD-883, add/883 after part number. Consult factory for 883 data sheet.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the DAC312 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. C |
–5– |