Analog Devices EVAL-AD421EB, AD421BRRL, AD421BR, AD421BN Datasheet

a		Loop-Powered
		4 mA to 20 mA DAC
		AD421

FEATURES

4 mA to 20 mA Current Output HART® Compatible

16-Bit Resolution and Monotonicity0.01% Integral Nonlinearity

5 V or 3 V Regulator Output

2.5 V and 1.25 V Precision Reference

750 A Quiescent Current max

Programmable Alarm Current Capability Flexible High Speed Serial Interface 16-Lead SOIC and PDIP Packages

GENERAL DESCRIPTION

The AD421 is a complete, loop-powered, digital to 4 mA to 20 mA converter, designed to meet the needs of smart transmitter manufacturers in the Industrial Control industry. It provides a high precision, fully integrated, low cost solution in a

compact 16-lead package. The AD421 is ideal for extending the resolution of smart 4 mA to 20 mA transmitters at very low cost.

The AD421 includes a selectable regulator that is used to power itself and other devices in the transmitter. This regulator provides either a +5 V, +3.3 V or +3 V regulated output voltage. The part also contains +1.25 V and +2.5 V precision references. The AD421 thus eliminates the need for a discrete regulator and voltage reference. The only external components required are a number of passive components and a pass transistor to span large loop voltages.

The AD421 can be used with standard HART FSK protocol communication circuitry without any degradation in specified performance. The high speed serial interface is capable of operating at 10 Mbps and allows for simple connection to com- monly-used microprocessors and microcontrollers via a standard three-wire serial interface.

The sigma-delta architecture of the DAC guarantees 16-bit monotonicity while the integral nonlinearity for the AD421 is

±0.01%. The part provides a zero scale 4 mA output current with ±0.1% offset error and a 20 mA full-scale output current with ±0.2% gain error.

The AD421 is available in a 16-lead, 0.3 inch-wide, plastic DIP and in a 16-lead, 0.3 inch-wide, SOIC package. The part is specified over the industrial temperature range of –40°C to +85°C.

FUNCTIONAL BLOCK DIAGRAM

	REF IN	REF OUT1	REF OUT2
	(+2.5V)	(+1.25V)	(+2.5V)	LV	VCC
				112.5k		75k
		AD421			134k
				BANDGAP			DRIVE
			REFERENCE				COMP
					121k
			LOCAL				BOOST
DATA		OSCILLATOR
	INPUT SHIFT
CLOCK	REGISTER
				SWITCHED
			16-BIT
				CURRENT
LATCH	DAC LATCH		SIGMA-	SOURCES		40
		DELTA DAC		AND
				FILTERING	80k		LOOP
	POWER-ON
							RTN
	RESET
			COM	C1 C2 C3

PRODUCT HIGHLIGHTS

1.The AD421 is a single chip, high performance, low cost solution for generating 4 mA to 20 mA signals for smart industrial control transmitters.

2.The AD421’s regulated supply voltage can be used to power any additional circuits in the transmitter. The regulated output value is pin selectable as either +3 V, +3.3 V or +5 V.

3.The AD421’s on-chip references can provide a precision reference voltage to other devices in the system. This reference voltage can be either +1.25 V or +2.5 V.

4.The AD421 is fully compatible with standard HART circuitry or other similar FSK protocols.

5.With the addition of a single discrete transistor, the AD421

can be operated from VCC + 2 V min to a maximum of the breakdown voltage of the pass transistor.

6.The AD421 converts the digital data to current with 16-bit

resolution and monotonicity. Full-scale settling time to

±0.1% typically occurs within 8 ms.

7.The AD421 features a programmable alarm current capability that allows the transmitter to send out of range currents to indicate a transducer fault.

HART is a registered trademark of the HART Communication Foundation.

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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: [phone]	World Wide Web Site: http://www.analog.com
Fax: [phone]	© Analog Devices, Inc., 2000

(Using DN25D1 as pass transistor as per Figure 3; AD421–LOOP-POWERED SPECIFICATIONSREF IN = REF OUT2; TA = TMIN to TMAX unless otherwise noted)

Parameter	B Versions2	Units	Conditions/Comments
OUTPUT CHARACTERISTICS
Current Loop Voltage Compliance3	VCC + 2	V min
	350	V max	DN25D Breakdown Voltage
Full-Scale Settling Time	8	ms typ	Settling Time to ±0.1%, C1 = C2 = 10 nF, C3 = 3.3 nF
Output Impedance	25	MΩ typ
AC Loop Voltage Sensitivity	2	µA/V typ	1200 Hz to 2200 Hz
VOLTAGE REGULATOR
Output Voltage (VCC)
3 V Mode	2.95/3.05	V min/V max	3 V Nominal. LV Pin Connected to VCC	µF to VCC
3.3 V Mode	3.25/3.35	V min/V max	3.3 V Nominal. LV Pin Connected Through 0.01
5 V Mode	4.95/5.05	V min/V max	5 V Nominal. LV Pin Connected to COM
Externally Available Current	3.25	mA min	Assuming 4 mA Flowing in the Loop
Line Regulation	1	µV/V typ
Load Regulation	15	µV/mA typ

DAC SPECIFICATIONS (VCC = +3 V to +5 V; REF IN = REF OUT2; TA = TMIN to TMAX unless otherwise noted)

Parameter	B Versions2	Units	Conditions/Comments
ACCURACY
Resolution	16	Bits
Monotonicity	16	Bits min
Integral Nonlinearity	± 0.01	% of FS max	FS = Full-Scale Output Current
Offset (4 mA) @ +25°C4	± 0.1	% of FS max	VCC = 5 V
Offset Drift	± 25	ppm of FS/°C max	Includes On-Chip Reference Drift
Total Output Error (20 mA) @ +25°C4	± 0.2	% of FS max	VCC = 5 V
Total Output Drift	± 50	ppm of FS/°C max	Includes On-Chip Reference Drift
VCC Supply Sensitivity	50	nA/mV max	25 nA/mV Typical
VOLTAGE REFERENCE
REF OUT2
Output Voltage	2.49/2.51	V min/V max	2.5 V Nominal
Drift	± 40	ppm/°C max	20 ppm/°C Typical from –40°C to +25°C and
Externally Available Current	0.5	mA min	–2.5 ppm/°C Typical from +25°C to +85°C
VCC Supply Sensitivity	150	µV/V max	15 µV/V Typical
Output Impedance	3	Ω typ
Noise (0.1 Hz–10 Hz)	6	µV (p-p) typ
REF OUT1			1.25 V Nominal, 100 kΩ Load to COM5
Output Voltage	1.24/1.26	V min/V max
Drift	± 50	ppm/°C max	20 ppm/°C Typical from –40°C to +25°C and
Externally Available Current	0.5	mA min	2 ppm/°C Typical from +25°C to +85°C
VCC Supply Sensitivity	150	µV/V max	15 µV/V Typical
Output Impedance	3	Ω typ
Noise (0.1 Hz–10 Hz)	4	µV (p-p) typ
REF IN		kΩ typ
Input Resistance	40
DIGITAL INPUTS	0.75 × VCC
VIH (Logic 1)		V min
VIL (Logic 0)	0.25 × VCC	V max
IIH	± 10	µA max	VIN = VCC
IIL	± 10	µA max	VIN = 0 V
Data Coding	Binary
Data Rate	10	Mbps max
POWER SUPPLIES
Operating Range	+2.95 to +5.05	V min to V max	Functional to 7 V
Quiescent Current		µA max	475 µA Typical
@ VCC = 3 V	650
@ VCC = 5 V	750	µA max	575 µA Typical

NOTES

1The DN25D is available from Supertex, Inc., 1350 Bordeaux Drive, Sunnyvale, CA 94089. 2Temperature range is –40°C to +85°C.

3The max current loop voltage compliance is determined by the pass transistor breakdown voltage and is 350 V for the DN25D.

4With VCC = 3 V, the transfer function shifts negative by typically 0.25%; a 16 kΩ resistor connected between COM and LOOPRTN will approximately compensate for the VCC supply sensitivity in moving from 5 V to 3 V by skewing the gain of the AD421.

5100 kΩ resistor only required if this reference is being used in application circuits. Specifications subject to change without notice.

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				AD421
TIMING CHARACTERISTICS1, 2, 3 (VCC = +3 V to +5 V, TA = TMIN to TMAX unless otherwise noted)
Parameter	(B Versions)	Units		Conditions/Comments
tCK	100	ns min		Data Clock Period
tCL	50	ns min		Data Clock Low Time
tCH	50	ns min		Data Clock High Time
tDW	30	ns min		Data Stable Width
tDS	30	ns min		Data Setup Time
tDH	0	ns min		Data Hold Time
tLD	50	ns min		Latch Delay Time
tLL	50	ns min		Latch Low Time
tLH	50	ns min		Latch High Time

NOTES

1Guaranteed by characterization at initial product release, not production tested. 2See Figures 1 and 2.

3All input signals are specified with tr = tf = 5 ns (10% to 90% of VCC ) and timed from a voltage level of (VIN + VIL )/2; tr and tf should not exceed 1 s on any digital input.

Specifications subject to change without notice.

CLOCK
								WORD "N"
DATA	1	0	1	1	0	0	1	0	0	1	1	1	0	0	1	1
(MSB)	B15	B14	B13	B12	B11	B10	B9	B8	B7	B6	B5	B4	B3	B2	B1	B0	(LSB)

WORD "N +1"

1	0	0	1
B15	B14	B13	B12

LATCH

Figure 1. Serial Interface Waveforms (Normal Data Load)

		tCK
	tCL
	CLOCK	tCH
	tDS	tDH
	DATA
		tDW
		tLD
	LATCH	tLL
		tLH

Figure 2. Serial Interface Timing Diagram

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AD421

ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)

DRIVE, BOOST, COMP to COM . . .	–0.5 V to VCC + 0.5 V
LOOP RTN to COM . . . . . . . . . . . . . .	. . . . . –2 V to + 0.5 V
Digital Input Voltage to COM . . . . . . .	–0.5 V to VCC + 0.5 V
Operating Temperature Range	–40°C to +85°C
Commercial (B Version) . . . . . . . . . . .
Storage Temperature Range . . . . . . . . . .	. . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . .	. . . . . . . . . +150°C
Plastic DIP Package, Power Dissipation .	. . . . . . . . . 670 mW
θJA Thermal Impedance . . . . . . . . . . . .	. . . . . . . . 116°C/W
Lead Temperature (Soldering, 10 sec) .	. . . . . . . . . . . 260°C
SOIC Package, Power Dissipation . . . . . .	. . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . .	. . . . . . . . 110°C/W
Lead Temperature, Soldering	+215°C
Vapor Phase (60 sec) . . . . . . . . . . . .
Infrared (15 sec) . . . . . . . . . . . . . . . .	. . . . . . . . . +220°C

*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

PIN CONFIGURATION

DIP and SOIC

REF OUT1	1				16	VCC
REF OUT2	2				15	BOOST
REF IN
	3				14	COMP
		AD421
LV	4				13	DRIVE
LATCH						C1
	5	TOP VIEW			12
CLOCK		(NOT TO SCALE)				C2
	6				11
DATA	7				10	C3
LOOP RTN
	8				9	COM

ORDERING GUIDE

	Temperature	Package
Model	Range	Option*
AD421BN	–40°C to +85°C	N-16
AD421BR	–40°C to +85°C	R-16
AD421BRRL	–40°C to +85°C	R-16; Reeled SOIC
EVAL-AD421EB	Evaluation Board

*N = Plastic DIP, R = SOIC.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although these devices feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

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		AD421
		PIN FUNCTION DESCRIPTIONS
Pin
No.	Mnemonic	Function
1	REF OUT1	Reference Output 1. A precision +1.25 V reference is provided at this pin. It is intended as a precision ref-
		erence source for other devices in the transmitter. REF OUT1 is a buffered output capable of providing up
		to 0.5 mA to external circuitry. If REF OUT 1 is required to sink current, a resistive load of 100 kΩ to COM
		should be added. (See Reference section.)
2	REF OUT2	Reference Output 2. A precision +2.5 V reference is provided at this pin. To operate the AD421 with its
		own reference, REF OUT2 should be connected to REF IN. It can also be used as a precision reference
		source for other devices in the transmitter. REF OUT2 is a buffered output capable of providing up to
		0.5 mA to external circuitry.
3	REF IN	Voltage Reference Input. The reference voltage for the AD421 is applied to this pin and it sets the span for
		the AD421. The nominal reference voltage for the AD421 is +2.5 V for correct operation. This can be sup-
		plied using an external reference source or by using the part’s own REF OUT2 voltage.
4	LV	Regulated Voltage Control Input. The LV input controls the loop gain of the servo amplifier to set VCC.
		With LV connected to COM, the regulator voltage is set to 5 V nominal. If the LV input is connected through
		0.01 µF to VCC, the regulated voltage is nominally 3.3 V. With LV connected to VCC the regulated voltage,
		VCC, is 3 V nominal.
5	LATCH	DAC Latch Input. Logic Input. A rising edge of the LATCH signal loads the data from the serial input shift
		register to the DAC latch and hence updates the output of the DAC. The number of clock cycles provided
		between latch pulses determines whether the DAC is in alarm or normal current mode. (See Digital Inter-
		face section.)
6	CLOCK	Data Clock Input. Data on the DATA input is clocked into the shift register on the rising edge of this
		CLOCK input. The period of this clock equals the input serial data bit rate. This serial clock rate can be up
		to 10 MHz. If 16 clock cycles are provided between LATCH pulses then the data on the DATA input is
		accepted as normal 4–20 mA data. If more than 16 clock cycles are provided between LATCH pulses, the
		data is assumed to be alarm current data (see Digital Interface section).
7	DATA	Data Input. The data to be loaded to the AD421 input shift register is applied to this input. Data should be
		valid on the rising edge of the CLOCK input.
8	LOOP RTN	Loop Return Output. LOOP RTN is the return path for current flowing in the current loop.
9	COM	Common. This is the reference potential for the AD421 analog and digital inputs and outputs and for the
		voltage regulator output.
10	C3	Filtering Capacitor. A low dielectric absorption capacitor ceramic capacitor should be connected between
		this pin and COM for internal filtering of the switched current sources.
11	C2	Filtering Capacitor. See C3 description.
12	C1	Filtering Capacitor. See C3 description.
13	DRIVE	Output from the Voltage Regulator Loop. The DRIVE signal controls the external pass transistor to establish and
		maintain the correct VCC level programmed by the LV inputs while providing the necessary bias as the loop cur-
		rent is programmed from 4 mA to 20 mA.
14	COMP	Compensation Capacitor Input. A capacitor connected between COMP and DRIVE is required to stabilize
		the feedback loop formed with the regulator op amp and the external pass transistor.
15	BOOST	This open collector pin sinks the necessary current from the loop so that the current flowing into BOOST
		plus the current flowing into COM is equal to the programmed loop current.
16	VCC	Power Supply. VCC is the power supply input of the AD421 and it also provides the voltage regulator output,
		driven by the external pass transistor. It is used both to bias the AD421 itself and to provide power for the
		rest of the smart transmitter circuitry. The LV input determines the regulated voltage output to be either
		3 V, 3.3 V or 5 V nominal. Alternatively, a separate power supply can be connected to this pin to power the
		AD421. VCC should be decoupled to COM with a 2.2 µF capacitor.

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