EVAL-AD7476
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EvaluationBoardfor1MSPS, |
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12-/ 10-Bit ADCs |
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EVAL-AD7476/77CB |
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FEATURES
Full-Featured Evaluation Board for the AD7476/ AD7477
EVAL-CONTROL BOARD Compatible Stand Alone Capability
On-Board Analog Buffering and Reference Various Linking Options
PC Software for Control and Data Analysis when used with EVAL-CONTROL BOARD
INTRODUCTION
This Technical Note describes the evaluation board for the AD7476/77. The AD7476/77 are, respectively, 12 bit and 10 bit, high speed, low power, successive-approxima- tion ADC's. The parts operate from a single 2.35 V to 5.25 V power supply and feature throughtput rates up to 1MSPS. The parts contain a low-noise, wide bandwidth track/hold amplifier which can handle input frequencies in excess of 1MHz. Full data on the AD7476/77 is available in the AD7476/77 data sheet available from Analog Devices and should be consulted in conjunction with this Technical Note when using the Evaluation Board.
On-board components include an AD780 which is a pin programmable +2.5 V or +3 V ultra high precision bandgap reference, an OP467 quad op-amp used to buffer the analog inputs and the REF195 precision bandgap, voltage reference, providing a 5 V reference voltage. There are various link options which are explained in detail on page 2.
Interfacing to this board is through a 96-way connector. This 96-way connector is compatible with the EVALCONTROL BOARD which is also available from Analog
Devices. External sockets are provided for the AIN input, the VIN input and the VBIASED input.
OPERATING THE AD7476/77 EVALUATION BOARD
Power Supplies
When using this evaluation board with the EVAL-CON- TROL BOARD all supplies are provided from the EVALCONTROL BOARD through the 96 way connector.
When using the board as a stand alone unit external supplies must be provided. This evaluation board has seven
power supply inputs: AVDD, AGND, +12 V, -12 V, AGND, DVDD and DGND. +5 V must be connected to the AVDD input to supply the AD780 and the Ref195 voltage refer-
ence. The VDD for the AD7476/77 can be supplied from either the AVDD external supply or from the selected voltage reference chip. +12 V and -12 V are used to supply the OP467 quad op-amp. 0V is connected to one or
both of the AGND inputs. The DVDD input can be used to supply a separate +5V for the 74LS04 DVDD pin. The
DGND input must be tied to 0V. The supplies are decoupled to the relevant ground plane with 10µF tantalum
and 0.1µF multilayer ceramic capacitors at the point where they enter the board. The supply pins of the quad op-amp and references are also decoupled to AGND with 10µF tantalum and a 0.1µF ceramic capacitors. The AD7476/77 AVDD supply pin is decoupled to AGND with 10uF tantalum and 0.1µF multilayer ceramic capacitors.
Extensive ground planes are used on this board to minimize the effect of high frequency noise interference. There
are two ground planes, AGND and DGND. These are connected at one location close to the AD7476/77.
Figure 1. FUNCTIONAL BLOCK DIAGRAM
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Voltage |
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Power Supplies |
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Reference |
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Vdd |
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CS |
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Input Buffer |
AD7476/77 |
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ADC |
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SCLK |
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96 Pin |
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VIN |
SDATA |
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DIN |
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Connector |
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Power |
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Bias-up |
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Supply |
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Circuit |
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Circuit |
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REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
EVAL-AD7476/77CB
LINK AND SWITCH OPTIONS
There are 12 link options which must be set for the required operating setup before using the evaluation board. The functions of these options are outlined below.
Link No. |
Function. |
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LK1 |
This link option is used to select |
a 50W termination on the analog input buffer circuit. |
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When this link is “inserted” the |
50W termination is applied. |
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When this link is “removed” the |
50W termination is removed. |
LK2 |
This link option controls the program pin of the AD780 voltage reference. |
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When this link is “inserted” the AD780 output voltage is set to +3.0 V. |
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When this link is “removed” the AD780 output voltage is set to +2.5 V. |
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LK3 |
This link is used to select a 50W |
termination on the input of the bias-up circuit. |
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When this link is “inserted” the |
50W termination is applied. |
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When this link is “removed” the 50W termination is removed. |
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LK4 |
This link option is used to connect the output of either the REF195 or the AD780 to the VDD |
pin of the |
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AD7476/77 ( if link 12 is in position C). |
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When this link is in position A the AD780 supplies the VDD voltage for the AD7476/77. |
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When this link is in position B the REF195 supplies the VDD voltage for the AD7476/77. |
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LK5 |
This link option sets the DC bias voltage that is applied to the optional bias-up/filter circuit. |
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When this link is in position “A”, the bias voltage is set to the same level as the voltage that is applied |
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to the AD7476/77 VDD pin. In this configuration a bipolar analog input applied to the Vin SMB socket is |
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biased up by the bias circuit and is presented at the Vbiased SMB as a uni-polar signal biased |
around |
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VDD/2. |
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When this link option is placed in position “B”, the bias voltage is set to AGND. In this configuration the bias- |
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up circuit is not used. |
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LK6 |
This link option is used to select the source of the +12 V supply. |
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In position A, the +12 V is supplied from the EVAL-CONTROL BOARD through the 96 way connector. |
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In position B, the +12 V is supplied from an external source through the power connector, J6. |
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LK7 |
This link option is used to select the source of the -12 V supply. |
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In position A, the -12 V is supplied from the EVAL-CONTROL BOARD through the 96 way connector. |
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In position B, the -12 V is supplied from an external source through the power connector, J6. |
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LK8-9 |
These links control the transfer of data from the AD7476/77 during a conversion for various frequencies of |
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SCLK. |
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Link 8 and 9 should be in position "A" for slower SCLK frequencies, giving valid data on the rising edge. |
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Link 8 and 9 should be in position "B" for fast SCLK frequencies, giving valid data on the following edge. |
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LK10 |
This link selects the source of the Vcc +5 V supply for the 74LS04. |
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When this link is in position "A", Vcc power is supplied from the same power source supplying the AD7476/ |
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77 VDD pin. |
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When this link is in position "B", VCC power must be must be supplied from an external source via the power |
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connector, J5. |
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LK11 |
This link option is used to connect the input of the VIN analog buffer to the AIN input socket or to AGND. |
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When this link is in position “A” the AIN socket is tied to the input of the VIN buffer. In this configuration, |
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an analog signal applied to the Ain input socket is buffered and presented at the AD7476/77 VIN input. |
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When this link is in position “B” the VIN buffer input is tied to AGND. |
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LK12 |
This link selects the source of the VDD supplied to the AD7476/77. |
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When this link is in position “A” the VDD must be supplied from an external source via J5. |
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When this link is in position “B” the VDD is supplied from the EVAL-CONTROL BOARD. |
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When this link is in position “C” the VDD is supplied from either the AD780 or the REF195 |
references. |
– 2 – |
REV. 0 |
EVAL-AD7476/77CB
SET-UP CONDITIONS
Care should be taken before applying power and signals to the evaluation board to ensure that all link positions are as per the required operating mode. Table I shows the position in which all the links are set when the evaluation
board |
is sent out. |
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Table I. Initial Link and Switch Positions |
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Link |
No. |
Position |
Function. |
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LK1 |
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Removed |
50W termination resistor is not applied to the |
input |
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VIN circuit. |
LK2 |
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Removed |
AD780 is set to provide a +2.5V reference. |
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LK3 |
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Removed |
50W termination resistor is not applied to the |
input |
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bias-up circuit. |
LK4 |
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Removed |
This is not relevant due to the position of LK12. |
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LK5 |
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A |
EVAL-CONTROL BOARD is selected as the DC bias voltage for the optional |
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bias-up/filter circuit. |
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LK6 |
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A |
+12V supplied from EVAL-CONTROL BOARD via J4. |
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LK7 |
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A |
-12V supplied from EVAL-CONTROL BOARD via J4. |
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LK8 |
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B |
SCLK signal from EVAL-CONTROL BOARD is not inverted, (for faster values |
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of SCLK). |
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LK9 |
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B |
SCLK signal from EVAL-CONTROL BOARD is not inverted, (for faster values |
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of SCLK). |
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LK10 |
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Removed |
This is not relevant due to the position of LK8 and LK9, (As 74LS04 is not in |
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use). |
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LK11 |
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A |
Ain SMB is connected to the input of the analog input buffer. |
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LK12 |
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B |
VDD for the AD7476/77 is supplied from the EVAL-CONTROL BOARD via J4. |
REV. 0 |
– 3 – |
EVAL-AD7476/77CB
EVALUATION BOARD INTERFACING
Interfacing to the evaluation board is via a 96-way connector, J4. J4 is used to connect the evaluation board to the EVAL-CONTROL BOARD or other system. The pinout for the J4 connector is shown in Figure 2 and its pin designations are given in Table II.
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A |
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1 |
32 |
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Figure 2. Pin Configuration for the 96-Way |
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Connector, J1 |
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96-Way Connector Pin Description |
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DR0 |
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Data Receive Zero. This input is connected to the |
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SDATA pin of the AD7476/77. |
TFS0/RFS0 Transmit/Receive Frame Sync Zero. These two outputs are connected to the CS pin of the AD7476/77.
SCLK0 |
Serial Clock Zero. This serial clock is connected |
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to the SCLK pin of the AD7476/77 with the |
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option of an inverting buffer. |
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DGND |
Digital Ground. These lines |
are connected to |
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the digital ground plane on |
the evaluation |
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board. It allows the user to provide the digital |
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supply via the connector along with the other |
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digital signals. |
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AGND |
Analog Ground. These lines are connected to |
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the analog ground plane on the evaluation board. |
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AVDD |
Analog +5 V Supply. These lines are connected |
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to the AVDD supply line on the board. |
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+12V |
+12 V Supply. This line is connected to the +12 |
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V supply line on the board via LK6. |
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-12V |
-12 V Supply. This line is connected to the -12 |
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V supply line on the board via LK7. |
Table II. 96-Way Connector Pin Functions.
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Row A |
RowB |
RowC |
1 |
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2 |
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3 |
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4 |
DGND |
DGND |
DGND |
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5 |
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DR0 |
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6 |
TFS0 |
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RFS0 |
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7 |
SCLK0 |
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SCLK0 |
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8 |
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9 |
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10 |
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11 |
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12 |
DGND |
DGND |
DGND |
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13 |
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14 |
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15 |
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16 |
DGND |
DGND |
DGND |
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18 |
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19 |
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20 |
DGND |
DGND |
DGND |
21 |
AGND |
AGND |
AGND |
22 |
AGND |
AGND |
AGND |
23 |
AGND |
AGND |
AGND |
24 |
AGND |
AGND |
AGND |
25 |
AGND |
AGND |
AGND |
26 |
AGND |
AGND |
AGND |
27 |
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AGND |
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28 |
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AGND |
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29 |
AGND |
AGND |
AGND |
30 |
-12 V |
AGND |
+12 V |
31 |
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32 |
AVDD |
AVDD |
AVDD |
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Note : The unused pins of the 96-way connector are not shown.
– 4 – |
REV. 0 |