DISCRETE SEMICONDUCTORS
DATA SHEET
BF1201; BF1201R; BF1201WR
N-channel dual-gate PoLo MOS-FETs
Preliminary specification |
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1999 Nov 26 |
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Philips Semiconductors |
Preliminary specification |
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N-channel dual-gate PoLo MOS-FETs
BF1201; BF1201R;
BF1201WR
FEATURES
•Short channel transistor with high forward transfer admittance to input capacitance ratio
•Low noise gain controlled amplifier
•Partly internal self-biasing circuit to ensure good cross-modulation performance during AGC and good DC stabilization.
APPLICATIONS
•VHF and UHF applications with 3 - 9 V supply voltage, such as digital and analogue television tuners and professional communications equipment.
DESCRIPTION
Enhancement type N-channel field-effect transistor with source and substrate interconnected. Integrated diodes between gates and source protect against excessive input voltage surges. The BF1201, BF1201R and BF1201WR are encapsulated in the SOT143B, SOT143R and SOT343R plastic packages respectively.
QUICK REFERENCE DATA
PINNING
PIN |
DESCRIPTION |
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1 |
source |
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2 |
drain |
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3 |
gate 2 |
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4 |
gate 1 |
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handbook, 2 columns4 |
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1 |
2 |
Top view |
MSB014 |
BF1201 marking code: LAp
Fig.1 Simplified outline (SOT143B).
handbook, 2 columns3 |
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4 |
2 |
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1 |
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Top view |
MSB035 |
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BF1201R marking code: LBp
Fig.2 Simplified outline (SOT143R).
dbook, halfpage |
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4 |
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2 |
1 |
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Top view |
MSB842 |
BF1201WR marking code: LA |
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Fig.3 |
Simplified outline |
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(SOT343R). |
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SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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VDS |
drain-source voltage |
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− |
10 |
V |
ID |
drain current |
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− |
− |
30 |
mA |
Ptot |
total power dissipation |
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− |
200 |
mW |
yfs |
forward transfer admittance |
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23 |
28 |
35 |
mS |
Cig1-ss |
input capacitance at gate 1 |
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2.6 |
3.1 |
pF |
Crss |
reverse transfer capacitance |
f = 1 MHz |
− |
15 |
30 |
fF |
F |
noise figure |
f = 400 MHz |
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1 |
1.8 |
dB |
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Xmod |
cross-modulation |
input level for k = 1% at |
105 |
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− |
dBµV |
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40 dB AGC |
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Tj |
operating junction temperature |
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− |
150 |
°C |
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
1999 Nov 26 |
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Philips Semiconductors Preliminary specification
N-channel dual-gate PoLo MOS-FETs |
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BF1201; BF1201R; |
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BF1201WR |
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LIMITING VALUES |
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In accordance with the Absolute Maximum Rating System (IEC 134). |
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SYMBOL |
PARAMETER |
CONDITIONS |
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MIN. |
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MAX. |
UNIT |
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VDS |
drain-source voltage |
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− |
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10 |
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V |
ID |
drain current |
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− |
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30 |
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mA |
IG1 |
gate 1 current |
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− |
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±10 |
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mA |
IG2 |
gate 2 current |
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− |
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±10 |
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mA |
Ptot |
total power dissipation |
Ts ≤ 110 °C; note 1 |
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200 |
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mW |
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Tstg |
storage temperature |
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−65 |
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+150 |
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°C |
Tj |
operating junction temperature |
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− |
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+150 |
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°C |
Note |
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1. Ts is the temperature of the soldering point of the source lead. |
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THERMAL CHARACTERISTICS |
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SYMBOL |
PARAMETER |
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CONDITIONS |
VALUE |
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UNIT |
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Rth j-s |
thermal resistance from junction to soldering point |
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200 |
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K/W |
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250 |
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Ptot |
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(mW) |
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200 |
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150 |
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100 |
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50 |
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0 |
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0 |
50 |
100 |
150 |
200 |
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Ts (°C) |
Fig.4 Power derating curve.
1999 Nov 26 |
3 |
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